Integrated Device Technology, Inc.
128K x 32
CMOS STATIC RAM
MODULES
DESCRIPTION:
IDT7MP4060
IDT7MP4095
FEATURES:
鈥?High density 4 megabit static RAM modules
鈥?Low profile 64-pin ZIP (Zig-zag In-line vertical Package),
64-lead, 72-lead SIMMs (Single In-line Memory Modules)
鈥?Fast access time: 15ns (max.)
鈥?Surface mounted plastic components on an epoxy
laminate (FR-4) substrate
鈥?Single 5V (鹵10%) power supply
鈥?Multiple GND pins and decoupling capacitors for maxi-
mum noise immunity
鈥?Inputs/outputs directly TTL compatible
鈥?Gold plated fingers on the SIMM version
PIN CONFIGURATION 鈥?7MP4095
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
GND
PD
1
I/O
8
I/O
9
I/O
10
I/O
11
A
0
A
1
A
2
I/O
12
I/O
13
I/O
14
I/O
15
GND
A
15
CS
2
PD
0
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
A
7
A
8
A
9
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
14
CS
1
CS
3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
PD
0
- OPEN
PD
1
- OPEN
The IDT7MP4095/7MP4060 are 128K x 32 static RAM
modules constructed on an epoxy laminate (FR-4) substrate
using four 128K x 8 static RAMs in plastic SOJ packages. The
IDT7MP4095/7MP4060 are available with access times as
fast as 15ns with minimal power consumption.
The IDT7MP4095 is packaged in a 64-pin FR-4 ZIP (Zig-
zag In-line vertical Package) or a 64-lead SIMM (Single In-line
Memory Module). The IDT7MP4060 is packaged in a 72-lead
SIMM. The ZIP configuration allows 64 pins to be placed on
a package 3.65 inches long and 0.21 inches thick. At only 0.60
inches high, this low-profile package is ideal for systems with
minimum board spacing, while the SIMM configuration allows
use of edge mounted sockets to secure the module.
All inputs and outputs of the IDT7MP4095/7MP4060 are
TTL compatible and operate from a single 5V supply. Full
asynchronous circuitry requires no clocks or refresh for opera-
tion and provides equal access and cycle times for ease of
use.
FUNCTIONAL BLOCK DIAGRAM
CS
1
CS
2
CS
3
CS
4
ADDRESS
WE
OE
17
128K x 32
RAM
CS
4
A
16
GND
I/O
16
I/O
17
I/O
18
I/O
19
A
10
A
11
A
12
A
13
I/O
20
I/O
21
I/O
22
I/O
23
GND
NC
OE
8
8
8
8
3147 drw 01
I/O
24
I/O
25
I/O
26
I/O
27
A
3
A
4
A
5
V
CC
A
6
I/O
28
I/O
29
I/O
30
I/O
31
I/O
0-31
PIN NAMES
I/O
0
鈥?/div>
31
A
0
鈥?/div>
16
Data Inputs/Outputs
Addresses
Chip Selects
Write Enable
Output Enable
Power
Ground
No Connect
3147 tbl 01
CS
1
鈥?/div>
4
WE
OE
V
CC
GND
NC
ZIP, SIMM
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
漏1996
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
SEPTEMBER 1996
DSC-3147/7
7.09
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3
4
5
6
7
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