128K x 24 Three Megabit
3.3V CMOS Static RAM
IDT7MMV4101
x
x
Features
High density 3 megabit 3.3V static RAM
Low profile 119 lead, 14mm x 22mm
BGA (Ball Grid Array)
Fast RAM access times: 10,12,15ns
Single 3.3V power supply
Multiple Vcc & GND pins for maximum noise immunity
Inputs/outputs directly LVTTL compatible
Commercial (0
O
C to +70
O
C) Industrial (-40
O
C to +85
O
C)
temperature options
鈥?Commercial: 10 / 12 / 15 ns
鈥?Industrial: 12 / 15 ns
Description
The IDT7MMV4101 is a three megabit static RAM constructed on an
multilayer laminate substrate using three 3.3V, 128K x 8 (IDT71V124)
static RAMS encapsulated in a Ball Grid Array (BGA).
The IDT7MMV4101 is packaged in a plastic BGA. The BGA configu-
ration allows 119 leads to be placed on a package 14mm by 22mm. At a
maximum of 3.5mm high, this low-profile surface mount package is ideal
for ultra dense systems.
All inputs and outputs of the IDT7MMV4101 are LVTTL compatible and
operate from a single 3.3V supply. Full asynchronous circuitry requires
no clocks or refresh for operation and provides equal access and cycle
times for ease of use.
x
x
x
x
x
Pin Names
I/O
0
-
23
A
0
-
16
CS
WE
OE
V
CC
GND
NC
Data Inputs/Outputs
Addresses
Chip Select
Write Enable
Output Enable
Power
Ground
No Connect
4083 tbl 01
Functional Block Diagram
A
0-16
CS
WE
OE
17
128K x 8
SRAM
128K x 8
SRAM
128K x 8
SRAM
8
8
8
,
I/O
0-7
I/O
8-15
I/O
16-23
4083 drw 01
Pin Configuration
7
NC
NC
A8
A7
CS
A6
A5
I/O0
NC
NC
NC
NC
NC
I/O1
VCC
I/O2 I/O3
I/O4 I/O5 NC
I/O6 I/O7 I/O8 I/O9 I/O10
I/O11 NC
NC
NC
NC
NC
NC
NC
6 A4
5 A3
4 A2
3 A1
2 A0
GND VCC GND VCC GND VCC GND VCC GND VCC
A12 A16
A11 A15
WE OE
A10 A14
A9
A13
GND VCC GND VCC GND VCC GND VCC GND VCC GND
GND
GND GND GND GND GND GND GND GND GND GND
GND VCC GND VCC GND VCC GND VCC GND VCC GND
VCC
GND VCC GND VCC GND VCC GND VCC GND VCC
,
1 NC NC
A
B
I/O12 I/O13 I/O14 I/O15 I/O16 I/O17 NC I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 NC NC
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
4083 drw 02
Top View
1
漏2003 Integrated Device Technology, Inc.
JANUARY 2003
DSC-4083/05