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IDT79RV3041-25 Datasheet

  • IDT79RV3041-25

  • INTEGRATED RISController⑩ FOR LOW-COST SYSTEMS

  • 34頁

  • IDT

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IDT79R3041
鈩?/div>
INTEGRATED RISController
鈩?/div>
FOR
LOW-COST SYSTEMS
Integrated Device Technology, Inc.
IDT79R3041
IDT79RV3041
FEATURES:
鈥?Instruction set compatible with IDT79R3000A
and RISController Family MIPS RISC CPUs
鈥?High level of integration minimizes system cost
鈥?RISC CPU
鈥?Multiply/divide unit
鈥?Instruction Cache
鈥?Data Cache
鈥?Programmable bus interface
鈥?Programmable port width support
鈥?On-chip instruction and data caches
鈥?2KB of Instruction Cache
鈥?512B of Data Cache
鈥?Flexible bus interface allows simple, low-cost designs
鈥?Superset pin-compatible with RISController
鈥?Adds programmable port width interface
(8-, 16-, and 32-bit memory sub-regions)
鈥?Adds programmable bus interface timing support
(Extended address hold, Bus turn around time,
Read/write masks)
ClkIn
Clock
Generator
Unit
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Double-frequency clock input
16.67MHz, 20MHz, 25MHz and 33MHz operation
20MIPS at 25MHz
Low cost 84-pin PLCC packaging
On-chip 4-deep write buffer eliminates memory write stalls
On-chip 4-word read buffer supports burst or simple block
reads
On-chip DMA arbiter
On-chip 24-bit timer
Boot from 8-bit, 16-bit, or 32-bit wide PROMs
Pin- and software-compatible family includes R3041, R3051,
R3052
鈩?/div>
, and R3081
鈩?/div>
Complete software support
鈥?Optimizing compilers
鈥?Real-time operating systems
鈥?Monitors/debuggers
鈥?Floating Point emulation software
鈥?Page Description Languages
Master Pipeline Control
System Control
Coprocessor
Exception/Control
Registers
Bus Interface
Registers
PortSize
Register
Counter
Registers
Virtual Address
32
Physical Address Bus
SBrCond(3:2)
Int(5:3)
,
SInt(2:0)
Integer
CPU Core
General Registers
(32 x 32)
ALU
Shifter
Mult/Div Unit
Address Adder
PC Control
TC
32
Instruction
Cache
2kB
Data Bus
R3051 Superset
Bus Interface Unit
4-deep
Write
Buffer
Data
Unpack
Unit
Address/
Data
4-deep
Read
Buffer
Data
Pack
Unit
DMA
Ctrl
DMA
Arbiter
BIU
Control
Data
Cache
512B
Timing/ Interface
Control
Rd
/
Wr
SysClk
2905 drw 01
Ctrl
Figure 1. R3041 Block Diagram
RISController, R3041, R3051, R3052, R3081, ORION, IDT/sim, and IDT/kit are trademarks, and the IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
漏1996 Integrated Device Technology, Inc.
MARCH 1996
DSC-2905/5
1

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