IDT74LVC32A
3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
QUADRUPLE 2-INPUT
POSITIVE-OR GATE
WITH 5 VOLT TOLERANT I/O
鈥?0.5 MICRON CMOS Technology
鈥?ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
鈥?V
CC
= 3.3V 鹵 0.3V, Normal Range
鈥?V
CC
= 2.7V to 3.6V, Extended Range
鈥?CMOS power levels (0.4碌 W typ. static)
碌
鈥?Rail-to-Rail output swing for increased noise margin
鈥?All inputs, outputs, and I/Os are 5V tolerant
鈥?Supports hot insertion
鈥?Available in SOIC, SSOP, and TSSOP packages
IDT74LVC32A
FEATURES:
DESCRIPTION:
The LVC32A quadruple 2-input positive -OR gate is built using advanced
dual metal CMOS technology. The LVC32A device performs the Boolean
function Y = A + B or Y =
A
路
B
in positive logic.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environment.
The LVC32A has been designed with a 鹵24mA output driver. This driver
is capable of driving a moderate to heavy load while maintaining speed
performance.
DRIVE FEATURES:
鈥?High Output Drivers: 鹵24mA
鈥?Reduced system switching noise
APPLICATIONS:
鈥?5V and 3.3V mixed voltage systems
鈥?Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
1
A
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4
B
4
A
4
Y
3
B
3
A
3
Y
A
Y
B
1
B
1
Y
2
A
2
B
2
Y
GND
SOIC/ SSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
xA, xB
xY
Inputs
Outputs
Description
FUNCTION TABLE
(EACH GATE)
(1)
Inputs
xA
H
X
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Output
xB
X
H
L
xY
H
H
L
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
漏1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4583/1
1
2
3
4
5
