IDT74LVC11A
3.3V CMOS TRIPLE 3-INPUT AND GATE WITH 5V TOLERANT I/O
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
TRIPLE 3-INPUT AND GATE
WITH 5 VOLT TOLERANT I/O
FEATURES:
DESCRIPTION:
IDT74LVC11A
鈥?0.5 MICRON CMOS Technology
鈥?ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
鈥?V
CC
= 3.3V 鹵 0.3V, Normal Range
鈥?V
CC
= 2.7V to 3.6V, Extended Range
鈥?CMOS power levels (0.4碌 W typ. static)
碌
鈥?Rail-to-Rail output swing for increased noise margin
鈥?All inputs, outputs, and I/Os are 5V tolerant
鈥?Supports hot insertion
鈥?Available in SOIC, SSOP, and TSSOP packages
The LVC11A triple 3-input AND gate is built using advanced dual metal
CMOS technology. The LVC11A device provides the 3-input AND
function.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
The LVC11A has been designed with a 鹵24mA output driver. This driver
is capable of driving a moderate to heavy load while maintaining speed
performance.
DRIVE FEATURES:
鈥?High Output Drivers: 鹵24mA
鈥?Reduced system switching noise
APPLICATIONS:
鈥?3.3V high speed systems
鈥?3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
1
A
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
1
C
1
Y
3
C
3
B
3
A
3
Y
xA
xB
xC
xY
1
B
2
A
2
B
2
C
FUNCTION TABLE
Inputs
xA
L
L
L
L
H
H
H
H
xB
L
L
H
H
L
L
H
H
(1)
Outputs
xC
L
H
L
H
L
H
L
H
xY
L
L
L
L
L
2
Y
GND
SOIC/ SSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Number
1, 3, 9
2, 4, 10
7
12, 6, 8
13, 5, 11
14
Symbol
1A - 3A
1B - 3B
GND
1Y - 3Y
1C - 3C
Data Inputs
Data Inputs
Ground (0V)
Data Outputs
Data Inputs
L
L
H
Name and Function
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
V
CC
Positive Supply Voltage
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
漏1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-5155/2
1
2
3
4
5
