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IDT74HLVC16702PV Datasheet

  • IDT74HLVC16702PV

  • Buffer/Driver

  • 8頁

  • ETC

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IDT74LVCH16702A
3.3V CMOS 18-BIT READ/WRITE BUFFER WITH 5V TOLERANT I/O
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT
READ/WRITE BUFFER
WITH 5 VOLT TOLERANT I/O
FEATURES:
DESCRIPTION:
IDT74LVCH16702A
鈥?Typical t
SK(o)
(Output Skew) < 250ps
鈥?ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
鈥?V
CC
= 3.3V 鹵 0.3V, Normal Range
鈥?V
CC
= 2.7V to 3.6V, Extended Range
鈥?CMOS power levels (0.4碌 W typ. static)
鈥?All inputs, outputs, and I/O are 5V tolerant
鈥?Supports hot insertion
鈥?Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
APPLICATIONS:
鈥?High Output Drivers: 鹵24mA
鈥?Reduced system switching noise
The LVCH16702A 18-bit read/write buffer is built using advanced dual
metal CMOS technology. The device is designed as an 18-bit read/write
buffer with a four deep FIFO and a read-back latch. It can be used as a read/
write buffer between a CPU and a memory or to interface a high-speed bus
and a slow peripheral. The A-to-B (write) path has a four deep FIFO for
pipelined operations. The FIFO can be reset and a FIFO full condition is
indicated by the full flag (FF). The B-to-A (read) path has a latch.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH16702A has been designed with a 鹵24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16702A has 鈥渂us-hold鈥?which retains the inputs鈥?last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
鈥?5V and 3.3V mixed voltage systems
鈥?Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
A
1:18
18
CE
CLK
RESET
28
55
27
29
OEBA
WCE
RCE
FF
2
56
30
FIFO
(4 deep)
CE
Q
REGISTER
D
OEAB
1
18
B
1:18
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
漏 1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4234/1

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