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FEATURES:
DESCRIPTION:
Advanced CMOS Technology
Guaranteed low skew < 100ps (max.)
Very low duty cycle distortion< 250ps (max.)
High speed propagation delay< 2ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
1:10 fanout
Maximum output rise and fall time < 1ns (max.)
Low input capacitance: 3pF typical
V
CC
= 3.3V 鹵 0.3V
Inputs can be driven from 3.3V or 5V components
Operating frequency up to 166MHz
Available in SSOP and QSOP packages
The FCT3807 is a 3.3V clock driver built using advanced CMOS technol-
ogy. This low skew clock driver offers 1:10 fanout. The large fanout from a single
input reduces loading on the preceding driver and provides an efficient clock
distribution network. Multiple power and grounds reduce noise. Typical
applications are clock and signal distribution.
FUNCTIONAL BLOCK DIAGRAM
O
1
PIN CONFIGURATION
IN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
O
10
O
9
GND
O
8
V
CC
O
7
GND
O
6
O
5
O
2
GND
O
1
O
3
V
CC
O
2
O
4
GND
O
3
O
5
IN
O
6
V
CC
O
4
GND
O
7
SSOP/ QSOP
TOP VIEW
O
8
O
9
O
10
INDUSTRIAL TEMPERATURE RANGE
1
c
2001 Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
JANUARY 2002
DSC-5865/14