Integrated Device Technology, Inc.
鈥?/div>
Typical t
SK
(o) (Output Skew) < 250ps
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
鈥?Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP and 15.7 mil pitch TVSOP
鈥?Extended commercial range of -40擄C to +85擄C
鈥?V
CC
= 3.3V
鹵0.3V,
Normal Range or
V
CC
= 2.7 to 3.6V, Extended Range
鈥?CMOS power levels (0.4碌W typ. static)
鈥?Rail-to-Rail output swing for increased noise margin
鈥?Low Ground Bounce (0.3V typ.)
鈥?Inputs (except I/O) can be driven by 3.3V or 5V
components
DESCRIPTION:
The FCT163374/A/C 16-bit edge-triggered D-type regis-
ters are built using advanced dual metal CMOS technology.
These high-speed, low-power registers are ideal for use as
buffer registers for data synchronization and storage. The
Output Enable (x
OE
) and clock (xCLK) controls are organized
to operate each device as two 8-bit registers or one 16-bit
register with common clock. Flow-through organization of
signal pins facilitates ease of layout. All inputs are designed
with hysteresis for improved noise margin.
The inputs of FCT163374/A/C can be driven from either
3.3V or 5V devices. This feature allows the use of these
devices as translators in a mixed 3.3V/5V supply system.
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
CLK
1
D
1
2
OE
2
CLK
D
1
O
1
2
D
1
D
2
O
1
C
C
TO 7 OTHER CHANNELS
2775 drw 01
TO 7 OTHER CHANNELS
2775 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
8.5
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