鈮?/div>
1碌A (max.)
V
CC
= 5V 鹵10%
Balanced Output Drivers: 鹵24mA
Reduced system switching noise
Typical VOLP (Output Ground Bounce) < 0.6V at V
CC
= 5V,
T
A
= 25擄C
鈥?Available in SSOP and TSSOP packages
DESCRIPTION:
The FCT162374T 16-bit edge-triggered D-type registers are built using
advanced dual metal CMOS technology. These high-speed, low-power
registers are ideal for use as buffer registers for data synchronization and
storage. The Output Enable (xOE) and clock (xCLK) controls are organized to
operate each device as two 8-bit registers or one 16-bit register with common
clock. Flow-through organization of signal pins simplifies layout. All inputs are
designed with hysteresis for improved noise margin.
The FCT162374T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall
times鈥搑educing the need for external series terminating resistors.The
FCT162374T are plug-in replacements for the FCT16374T and ABT16374 for
on-board bus interface applications.
FUNCTIONAL BLOCK DIAGRAM
1
OE
2
OE
1
CLK
2
CLK
1
D
1
D
1
O
1
2
D
1
D
2
O
1
C
C
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
漏 2006 Integrated Device Technology, Inc.
JUNE 2006
DSC-5453/6