鈩?/div>
Isolation Under Power-Off Conditions
Over-voltage tolerant
Latch-up performance exceeds 100mA
V
CC
= 2.3V - 3.6V, normal range
ESD >2000V per MIL-STD-883, Method 3015; >200V using
machine model (C = 200pF, R = 0)
鈥?Available in SSOP, QSOP, and TSSOP packages
DESCRIPTION:
The CBTLV3862 provides ten bits of high-speed bus switching with low
on-state resistance of the switch allowing connections to be made with
minimal propagation delay.
The device is organized as one 10-bit bus switch. The switches are
controlled by independent active-low enable (OE) and active-high enable
(OE) controls.
To ensure the high-impedance state during power up or power down,
OE
should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver, and
OE should be tied to GND.
APPLICATIONS:
鈥?3.3V High Speed Bus Switching and Bus Isolation
FUNCTIONAL BLOCK DIAGRAM
SIMPLIFIED SCHEMATIC, EACH
SWITCH
A1
2
SW
22
B1
A10
11
SW
13
A
B10
B
OE
OE
1
23
OE
OE
INDUSTRIAL TEMPERATURE RANGE
1
c
2002 Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
APRIL 2002
DSC-5264/1