鈩?/div>
Isolation Under Power-Off Conditions
Over-voltage tolerant
Latch-up performance exceeds 100mA
V
CC
= 2.3V - 3.6V, normal range
ESD >2000V per MIL-STD-883, Method 3015; >200V using
machine model (C = 200pF, R = 0)
鈥?Available in SSOP, TSSOP, and TVSOP packages
DESCRIPTION:
The CBTLV16210 operates as a single 20-bit bus switch or as a dual
10-bit bus switch,which provides high-speed switching. This device has
very low ON resistance, resulting in under 250ps propagation delay
through the switch. When Output Enable (OE) is low, the corresponding
10-bit bus switch is on and port A is connected to Port B. When
OE
is high,
the switch is off and a high impedance exists between Port A and Port B.
To ensure the high-impedance state during power up or power down,
OE
should be tied to V
CC
through a pullup resistor.
APPLICATIONS:
鈥?3.3V High Speed Bus Switching and Bus Isolation
FUNCTIONAL BLOCK DIAGRAM
SIMPLIFIED SCHEMATIC, EACH
SWITCH
1B1
2
1A1
SW
46
1A10
12
SW
36
1B10
A
B
48
1OE
2A1
13
SW
35
2B1
OE
24
SW
25
2A10
2B10
47
2OE
INDUSTRIAL TEMPERATURE RANGE
1
c
2002 Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
AUGUST 2002
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