鈥?/div>
Direct microprocessor access to all internal memories
Memory block programming for quick setup
IEEE-1149.1 (JTAG) Test Port
Internal Loopback for testing
Available in 144-pin Thin Quad Flatpack (TQFP) and
144-pin Ball Grid Array (BGA) packages
Operating Temperature Range -40擄C to +85擄C
擄
擄
3.3V I/O with 5V tolerant inputs and TTL compatible outputs
DESCRIPTION:
The IDT72V71623 has a maximum non-blocking switch capacity of
2,048 x 2,048 channels with data rates at 2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s
or 16.384 Mb/s. With 16 inputs and 16 outputs, a variety of rate combinations
is supported under Mux/Demux mode, to allow for switching between streams
of different data rates.
FUNCTIONAL BLOCK DIAGRAM
Vcc GND
RESET
TMS
TDI
TDO
TCK
TRST
ODE
Test Port
RX0
Loopback
RX1
RX2
RX3
RX4
RX5
RX6
RX7
RX8
RX9
RX10
RX11
RX12
RX13
RX14
RX15
Output
MUX
Data Memory
Receive
Serial Data
Streams
Transmit
Serial Data
Streams
Internal
Registers
Connection
Memory
TX0
TX1
TX2
TX3
TX4
TX5
TX6
TX7
TX8
TX9
TX10
TX11
TX12
TX13
TX14
TX15
OEI0
OEI1
OEI2
OEI3
OEI4
OEI5
OEI6
OEI7
OEI8
OEI9
OEI10
OEI11
OEI12
OEI13
OEI14
OEI15
Timing Unit
Microprocessor Interface
5903 drw01
CLK
F0i
FE/
WFPS
HCLK
DS
CS
R/W A0-A13
DTA
D0-D15
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUS
廬
is a trademark of Mitel Corp.
MAY 2002
DSC-5903/6
1
錚?/div>
2002
Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
next