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IDT72825LB20BG Datasheet

  • IDT72825LB20BG

  • CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 ...

  • 26頁(yè)

  • IDT

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CMOS DUAL SyncFIFO鈩?/div>
DUAL 256 x 18, DUAL 512 x 18,
DUAL 1,024 x 18, DUAL 2,048 x 18
and DUAL 4,096 x 18
IDT72805LB
IDT72815LB
IDT72825LB
IDT72835LB
IDT72845LB
FEATURES:
鈥?/div>
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The IDT72805LB is equivalent to two IDT72205LB 256 x 18 FIFOs
The IDT72815LB is equivalent to two IDT72215LB 512 x 18 FIFOs
The IDT72825LB is equivalent to two IDT72225LB 1,024 x 18 FIFOs
The IDT72835LB is equivalent to two IDT72235LB 2,048 x 18 FIFOs
The IDT72845LB is equivalent to two IDT72245LB 4,096 x 18 FIFOs
Offers optimal combination of large capacity (8K), high speed,
design flexibility, and small footprint
Ideal for the following applications:
- Network switching
- Two level prioritization of parallel data
- Bidirectional data transfer
- Bus-matching between 18-bit and 36-bit data paths
- Width expansion to 36-bit per package
- Depth expansion to 8,192 words per package
10ns read/write cycle time, 6.5ns access time
IDT Standard or First Word Fall Through timing
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Single or double register-buffered Empty and Full Flags
Easily expandable in depth and width
Asynchronous or coincident Read and Write clocks
Asynchronous or synchronous programmable Almost-Empty
and Almost-Full flags with default settings
Half-Full flag capability
Output Enable puts output data bus in high-impedance state
High-performance submicron CMOS technology
Available in the 128-pin Thin Quad Flatpack (TQFP). Also
available for the IDT72805LB/72815LB/72825LB, in the 121-lead,
16 x 16 mm plastic Ball Grid Array (PBGA)
Industrial temperature range (鈥?0擄C to +85擄C) is available
擄
擄
DESCRIPTION:
The IDT72805LB/72815LB/72825LB/72835LB/72845LB are dual 18-bit-wide
synchronous (clocked) First-in, First-out (FIFO) memories. One dual IDT72805LB/
72815LB/72825LB/72835LB/72845LB device is functionally equivalent to two
FUNCTIONAL BLOCK DIAGRAM
FFA/IRA
WCLKA
WENA
HFA/(WXOA)
PAEA
EFA/
ORA
WCLKB
WENB
PAFA
DA
0
-DA
17
LDA
DB0-DB17
LDB
INPUT
REGISTER
OFFSET
REGISTER
INPUT
REGISTER
OFFSET
REGISTER
FFB/IRB
PAFB
EFB/ORB
PAEB
HFB/(WXOB)
WRITE
CONTROL
LOGIC
WRITE
POINTER
FLA
WXIA
(HFA)/WXOA
RXIA
RXOA
RSA
RAM
ARRAY
256 x 18
512 x 18
1,024 x 18
2,048 x 18
4,096 x 18
FLAG
LOGIC
WRITE
CONTROL
LOGIC
READ
POINTER
READ
CONTROL
LOGIC
WRITE
POINTER
RAM
ARRAY
256 x 18
512 x 18
1,024 x 18
2,048 x 18
4,096 x 18
FLAG
LOGIC
READ
POINTER
READ
CONTROL
LOGIC
EXPANSION
LOGIC
OUTPUT
REGISTER
EXPANSION
LOGIC
OUTPUT
REGISTER
RESET
LOGIC
RESET
LOGIC
OEA
QA
0
-QA
17
RCLKA
RENA
RSB
RXOB
RXIB
(HFB)/WXOB
WXIB
FLB
OEB
QB
0
-QB
17
RCLKB
RENB
3139 drw 01
IDT and the IDT logo are registered trademarks. The SyncFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
錚?003
Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
FEBRUARY 2003
DSC-3139/4

IDT72825LB20BG相關(guān)型號(hào)PDF文件下載

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