16 x 16 PARALLEL CMOS
MULTIPLIER-ACCUMULATOR
Integrated Device Technology, Inc.
IDT7210L
FEATURES:
鈥?16 x 16 parallel multiplier-accumulator with selectable
accumulation and subtraction
鈥?High-speed: 20ns multiply-accumulate time
鈥?IDT7210 features selectable accumulation, subtraction,
rounding and preloading with 35-bit result
鈥?IDT7210 is pin and function compatible with the TRW
TDC1010J, TMC2210, Cypress CY7C510, and AMD
AM29510
鈥?Performs subtraction and double precision addition and
multiplication
鈥?Produced using advanced CMOS high-performance
technology
鈥?TTL-compatible
鈥?Available in topbraze DIP, PLCC, Flatpack and Pin Grid
Array
鈥?Military product compliant to MIL-STD-883, Class B
鈥?Standard Military Drawing #5962-88733 is listed on this
function
鈥?Speeds available:
Commercial: L20/25/35/45/55/65
Military:
L25/30/40/55/65/75
DESCRIPTION:
The IDT7210 is a high-speed, low-power 16 x 16-bit parallel
multiplier-accumulator that is ideally suited for real-time digital
signal processing applications. Fabricated using CMOS
silicon gate technology, this device offers a very low-power
alternative to existing bipolar and NMOS counterparts, with
only 1/7 to 1/10 the power dissipation and exceptional speed
(25ns maximum) performance.
A pin and functional replacement for TRW鈥檚 TDC1010J the
IDT7210 operates from a single 5 volt supply and is compatible
with standard TTL logic levels. The architecture of the IDT7210
is fairly straightforward, featuring individual input and output
registers with clocked D-type flip-flop, a preload capability
which enables input data to be preloaded into the output
registers, individual three-state output ports for the Extended
Product (XTP) and Most Significant Product (MSP) and a
Least Significant Product output (LSP) which is multiplexed
with the Y input.
The X
IN
and Y
IN
data input registers may be specified
through the use of the Two鈥檚 Complement input (TC) as either
a two鈥檚 complement or an unsigned magnitude, yielding a full-
precision 32-bit result that may be accumulated to a full 35-bit
result. The three output registers 鈥?Extended Product (XTP),
Most Most Significant Product (MSP) and Least Significant
Product (LSP) 鈥?are controlled by the respective TSX, TSM
and TSL input lines. The LSP output can be routed through Y
IN
ports.
FUNCTIONAL BLOCK DIAGRAM
CLKX
X
IN
(X
15
-X
0
)
16
ACC, SUB,
RND, TC
4
CLKY
Y
IN
(Y
15
-Y
0
/P
15
-P
0
)
16
XREGISTER
CONTROL
REGISTER
MULTIPLIER ARRAY
32
YREGISTER
+
+/鈥?/div>
TSL
PREL
ACCUMULATOR
35
35
CLKP
TSX
3
XTP
OUT
(P
34
-P
32
)
XTP REGISTER
3
MSP REGISTER
LSP REGISTER
16
TSM
PREL
16
MSP
OUT
(P
31
-P
16
)
IDT7210
2577 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1995
Integrated Device Technology, Inc.
AUGUST 1995
DSC-2018/7
11.2
1
1
2
3
4
5
6
7
8
9
10
