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IDT71B74S20TP Datasheet

  • IDT71B74S20TP

  • BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

  • 9頁(yè)

  • IDT

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BiCMOS STATIC RAM
64K (8K x 8-BIT)
CACHE-TAG RAM
Integrated Device Technology, Inc.
IDT71B74
FEATURES:
鈥?High-speed address to MATCH comparison time
鈥?Commercial: 8/10/12/15/20ns (max.)
鈥?High-speed address access time
鈥?Commercial: 8/10/12/15/20ns (max.)
鈥?High-speed chip select access time
鈥?Commercial: 6/7/8/10ns (max.)
鈥?Power-ON Reset Capability
鈥?Low power consumption
鈥?830mW (typ.) for 12ns parts
鈥?880mW (typ.) for 10ns parts
鈥?920mW (typ.) for 8ns parts
鈥?Produced with advanced BiCMOS high-performance
technology
鈥?Input and output directly TTL-compatible
鈥?Standard 28-pin plastic DIP and 28-pin SOJ (300 mil)
DESCRIPTION:
The IDT71B74 is a high-speed cache address comparator
subsystem consisting of a 65,536-bit static RAM organized as
8K x 8 and an 8-bit comparator. A single IDT71B74 can map
8K cache words into a 2 megabyte address space by using the
21 bits of address organized with the 13 LSBs for the cache
address bits and the 8 higher bits for cache data bits. Two
IDT71B74s can be combined to provide 29 bits of address
comparison, etc. The IDT71B74 also provides a single RAM
clear control, which clears all words in the internal RAM to zero
when activated. This allows the tag bits for all locations to be
cleared at power-on or system-reset, a requirement for cache
comparator systems. The IDT71B74 can also be used as a
resettable 8K x 8 high-speed static RAM.
The IDT71B74 is fabricated using IDT鈥檚 high-performance,
high-reliability BiCMOS technology. Address access times as
fast as 8ns, chip select times of 6ns and address-to-match
times of 8ns are available.
The MATCH pin of several IDT71B74s can be wired-ORed
together to provide enabling or acknowledging signals to the
data cache or processor, thus eliminating logic delays and
increasing system throughput.
FUNCTIONAL BLOCK DIAGRAM
A
0
ADDRESS
DECODER
A
12
65,536-BIT
MEMORY ARRAY
V
CC
GND
RESET
I/O
0 - 7
8
I/O CONTROL
WE
OE
CS
CONTROL
LOGIC
EQUAL
MATCH (OPEN DRAIN)
3013 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
DSC-3013/4
14.1
1

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