HIGH-SPEED
4K x 8 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT7134SA/LA
FEATURES:
鈥?High-speed access
鈥?Military: 25/35/45/55/70ns (max.)
鈥?Commercial: 20/25/35/45/55/70ns (max.)
鈥?Low-power operation
鈥?IDT7134SA
Active: 500mW (typ.)
Standby: 5mW (typ.)
鈥?IDT7134LA
Active: 500mW (typ.)
Standby: 1mW (typ.)
鈥?Fully asynchronous operation from either port
鈥?Battery backup operation鈥?V data retention
鈥?TTL-compatible; single 5V (鹵10%) power supply
鈥?Available in several popular hermetic and plastic packages
鈥?Military product compliant to MIL-STD-883, Class B
鈥?Industrial temperature range (鈥?0擄C to +85擄C) is available,
tested to military electrical specifications
DESCRIPTION:
The IDT7134 is a high-speed 4K x 8 Dual-Port Static RAM
designed to be used in systems where on-chip hardware port
arbitration is not needed. This part lends itself to those
systems which cannot tolerate wait states or are designed to
be able to externally arbitrate or withstand contention when
both sides simultaneously access the same Dual-Port RAM
location.
The IDT7134 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. It is the user鈥檚 responsibility to ensure data integrity
when simultaneously accessing the same memory location
from both ports. An automatic power down feature, controlled
by
CE
, permits the on-chip circuitry of each port to enter a very
low standby power mode.
Fabricated using IDT鈥檚 CMOS high-performance
technology, these Dual-Port typically on only 500mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each port typically consuming 200碌W
from a 2V battery.
The IDT7134 is packaged on either a sidebraze or plastic
48-pin DIP, 48-pin LCC, 52-pin PLCC and 48-pin Ceramic
Flatpack. Military grade product is manufactured in compliance
with the latest revision of MIL-STD-883, Class B, making it
ideally suited to military temperature applications demanding
the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
R/
W
L
R/
W
R
CE
L
CE
R
OE
L
I/O
0L
- I/O
7L
COLUMN
I/O
COLUMN
I/O
OE
R
I/O
0R
- I/O
7R
A
0L
- A
11L
LEFT SIDE
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
RIGHT SIDE
ADDRESS
DECODE
LOGIC
A
0R
- A
11R
2720 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996 Integrated Device Technology, Inc.
For latest information contact IDT鈥檚 web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2720/4
6.04
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