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IDT70V3599S133BFI Datasheet

  • IDT70V3599S133BFI

  • HIGH-SPEED 3.3V 128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RA...

  • 23頁

  • IDT

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HIGH-SPEED 3.3V
128/64K x 36
SYNCHRONOUS
IDT70V3599/89S
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Features:
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed data access
鈥?Commercial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
鈥?Industrial: 4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
鈥?6ns cycle time, 166MHz operation (12Gbps bandwidth)
鈥?Fast 3.6ns clock to data out
鈥?1.7ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 166MHz
鈥?Data input, address, byte enable and control registers
鈥?Self-timed write allows fast cycle time
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
鈼?/div>
Separate byte controls for multiplexed bus and bus
matching compatibility
Dual Cycle Deselect (DCD) for Pipelined Output mode
LVTTL- compatible, 3.3V (鹵150mV) power supply
for core
LVTTL compatible, selectable 3.3V (鹵150mV) or 2.5V
(鹵100mV) power supply for I/Os and control signals on
each port
Industrial temperature range (-40擄C to +85擄C) is
available at 133MHz.
Available in a 208-pin Plastic Quad Flatpack (PQFP),
208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball
Grid Array (BGA)
Supports JTAG features compliant with IEEE 1149.1
Functional Block Diagram
BE
3L
BE
2L
BE
1L
BE
0L
BE
3R
BE
2R
BE
1R
BE
0R
FT/PIPE
L
1/0
0a 1a
a
0b 1b
b
0c 1c
c
0d 1d
d
1d 0d
d
1c 0c
c
1b 0b
b
1a 0a
a
1/0
FT/PIPE
R
R/W
L
R/W
R
CE
0L
CE
1L
1
0
1/0
B
W
0
L
B
W
1
L
B B B
WWW
2 3 3
L L R
B
W
2
R
B B
WW
1 0
R R
1
0
1 /0
CE
0R
CE
1R
OE
L
OE
R
Dout0-8_L
Dout9-17_L
Dout18-26_L
Dout27-35_L
Dout0-8_R
Dout9-17_R
Dout18-26_R
Dout27-35_R
1d 0d
1c 0c 1b 0b 1a 0a
a b cd
0a 1a 0b 1b
0c 1c 0d 1d
0/1
FT/PIPE
L
0/1
FT/PIPE
R
d cba
128K x 36
MEMORY
ARRAY
I/O
0L
- I/O
35 L
Din_L
Din_R
I/O
0R
- I/O
35R
CLK
L
A
16L (1)
A
0L
REPEAT
L
ADS
L
CNTEN
L
CLK
R
,
A
16R
(1)
Counter/
Address
Reg.
ADDR_L
ADDR_R
Counter/
Address
Reg.
A
0R
REPEAT
R
ADS
R
CNTEN
R
5617 tbl 01
TDI
NOTE:
1. A
16
is a NC for IDT70V3589.
JTAG
TDO
TCK
TMS
TRST
MAY 2003
1
DSC 5617/6
漏2003 Integrated Device Technology, Inc.

IDT70V3599S133BFI 產(chǎn)品屬性

  • 7

  • 集成電路 (IC)

  • 存儲(chǔ)器

  • -

  • RAM

  • SRAM - 雙端口，同步

  • 4.5M（128K x 36）

  • 133MHz

  • 并聯(lián)

  • 3.15 V ~ 3.45 V

  • -40°C ~ 85°C

  • 208-LFBGA

  • 208-CABGA（15x15）

  • 托盤

  • 70V3599S133BFI

IDT70V3599S133BFI相關(guān)型號(hào)PDF文件下載

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