HIGH-SPEED
4K x 9 SYNCHRONOUS
DUAL-PORT RAM
Integrated Device Technology, Inc.
IDT7099S
FEATURES:
鈥?High-speed clock-to-data output times
鈥?Military: 20/25/30ns (max.)
鈥?Commercial: 15/20/25ns (max.)
鈥?Low-power operation
鈥?IDT7099S
Active: 900 mW (typ.)
Standby: 50 mW (typ.)
鈥?Architecture based on Dual-Port RAM cells
鈥?Allows full simultaneous access from both ports
鈥?Independent bit/byte Read and Write inputs for control
functions
鈥?Synchronous operation
鈥?4ns setup to clock, 1ns hold on all control, data, and
address inputs
鈥?Data input, address, and control registers
鈥?Fast 15ns clock to data out
鈥?20ns cycle times, 50MHz operation
鈥?Clock enable feature
鈥?Guaranteed data output hold times
鈥?Available in 68-pin PGA, 68-pin PLCC, and 80-pin TQFP
鈥?Military product compliant to MIL-STD-883, Class B
鈥?Industrial temperature range (鈥?0擄C to +85擄C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT7099 is a high-speed 4K x 9 bit synchronous Dual-
Port RAM. The memory array is based on Dual-Port memory
cells to allow simultaneous access from both ports. Registers
on control, data, and address inputs provide low set-up and
hold times. The timing latitude provided by this approach
allow systems to be designed with very short realized cycle
times. With an input data register, this device has been
optimized for applications having unidirectional data flow or
bi-directional data flow in bursts. Changing data direction from
reading to writing normally requires one dead cycle.
These Dual-Ports typically operate on only 900mW of
power at maximum high-speed clock-to-data output times as
fast as 15ns. An automatic power down feature, controlled
by
CE
, permits the on-chip circuitry of each port to enter a very
low standby power mode.
The IDT7099 is packaged in a 68-pin PGA, 68-pin PLCC,
and a 80-pin TQFP. Military grade product is manufactured in
compliance with the latest revision of MIL-STD-883, Class B,
making it ideally suited to military temperature applications
demanding the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
REGISTER
REGISTER
I/O
8L
I/O
0-7L
WRITE
LOGIC
SENSE
AMPS
MEMOR
MEMORY
Y
ARRAY
ARRAY
DECODER DECODER
WRITE
LOGIC
SENSE
AMPS
I/O
8R
I/O
0-7R
BIT
OE
L
BYTE
OE
L
CLK
L
REG
en
REG
en
BIT
OE
R
BYTE
OE
R
CLK
R
CLKEN
CLKEN
R
Write
Control
Logic
REG
A
0L
-A
11L
A
0R
-A
11R
Write
Control
Logic
BIT R/
REG
W
L
BYTE R/
W
L
BIT R/
W
R
BYTE R/
W
R
CE
R
3007 drw 01
CE
L
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996 Integrated Device Technology, Inc.
For latest information contact IDT鈥檚 web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-3007/3
6.23
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