音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

IDT5V9351PRI Datasheet

  • IDT5V9351PRI

  • LOW VOLTAGE PLL CLOCK DRIVER

  • 10頁

  • IDT

掃碼查看芯片數(shù)據(jù)手冊

上傳產品規(guī)格書

PDF預覽

IDT5V9351
LOW VOLTAGE PLL CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
LOW VOLTAGE PLL
CLOCK DRIVER
IDT5V9351
FEATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Fully integrated PLL
Output frequency up to 200MHz
2.5V and 3.3V Compatible
Compatible with PowerPC鈩? Intel, and high performance RISC
microprocessors
Output frequency configurable
Cycle-to-cycle jitter max. 22ps RMS
Compatible with MPC9351
Available in TQFP package
DESCRIPTION:
The IDT5V9351 is a high performance, zero delay, low skew, phase-lock
loop (PLL) clock driver. It has four banks of configurable outputs. The
IDT5V9351 uses a differential PECL reference input and an external feedback
input. These features allow the IDT5V9351 to be used as a zero delay, low
skew fan-out buffer. REF_SEL allows selection between PECL input or TCLK,
a CMOS clock driver input.
If PLL_EN is set to low and REF_SEL to high, it will bypass the PLL. By doing
so, the IDT5V9351 will be in clock buffer mode. Any clock applied to TCLK will
be divided down to four output banks.
When PLL_EN is set high, PLL is enabled. Any clock applied to TCLK will
be clocked in both phase and frequency to FBIN. PECL clock is activated by
setting REF_SEL to low.
FUNCTIONAL BLOCK DIAGRAM
(pullup)
0
REF
(pulldown)
t
CLK
REF_
SEL
FBIN
(pulldown)
(pulldown)
1
1
0
梅2
梅4
梅8
1
0
D
Q
Q
A
PECL_CLK
PECL_CLK
PLL
FB
200 - 400MHz
0
D
1
PLL_En
(pullup)
Q
Q
B
Q
C
0
0
f
SELA
f
SELB
f
SELC
f
SELD
(pulldown)
1
(pulldown)
Q
D
0
(pulldown)
Q
D
1
(pulldown)
0
D
1
Q
D
3
Q
Q
D
2
D
Q
Q
C
1
Q
D
4
OE
(pulldown)
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
MARCH 2003
DSC-5972/16
漏 2003 Integrated Device Technology, Inc.

IDT5V9351PRI相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT [Integ...
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK?
    IDT
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT [Integ...
  • 英文版
    2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER
    IDT
  • 英文版
    2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER
    IDT [Integ...
  • 英文版
    2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER
    IDT
  • 英文版
    2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER
    IDT [Integ...
  • 英文版
    2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
    IDT
  • 英文版
    2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
    IDT [Integ...
  • 英文版
    PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
    IDT
  • 英文版
    PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
    IDT [Integ...
  • 英文版
    PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
    IDT
  • 英文版
    PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
    IDT [Integ...
  • 英文版
    1:4 CLOCK BUFFER
    IDT [Integrated...
  • 英文版
    PROGRAMMABLE CLOCK GENERATOR
    IDT
  • 英文版
    PROGRAMMABLE CLOCK GENERATOR
    IDT [Integ...
  • 英文版
    SINGLE OUTPUT CLOCK GENERATOR
    IDT
  • 英文版
    SINGLE OUTPUT CLOCK GENERATOR
    IDT [Integ...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術客服：

0571-85317607

網站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經采納，將有感恩紅包奉上哦！