音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

IDT5T915 Datasheet

  • IDT5T915

  • 2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER

  • 127.83KB

  • 19頁(yè)

  • IDT

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書(shū)

PDF預(yù)覽

IDT5T915
2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
INDUSTRIAL TEMPERATURE RANGE
2.5V DIFFERENTIAL
1:5 CLOCK BUFFER
TERABUFFER鈩?/div>
FEATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
IDT5T915
DESCRIPTION:
Guaranteed Low Skew < 25ps (max)
Very low duty cycle distortion < 300ps (max)
High speed propagation delay < 2ns (max)
Up to 250MHz operation
Very low CMOS power levels
Hot insertable and over-voltage tolerant inputs
3-level inputs for selectable interface
Selectable HSTL, eHSTL, 1.8V / 2.5V LVTTL, or LVEPECL input
interface
鈥?Selectable differential or single-ended inputs and five differen-
tial outputs
鈥?2.5V V
DD
鈥?Available in TSSOP package
The IDT5T915 2.5V differential (DDR) clock buffer is a user-selectable
single-ended or differential input to five differential outputs built on advanced
metal CMOS technology. The differential clock buffer fanout from a single or
differential input to five differential or single-ended outputs reduces loading on
the preceding driver and provides an efficient clock distribution network. The
IDT5T915 can act as a translator from a differential HSTL, eHSTL, 1.8V/2.5V
LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to HSTL, eHSTL,
1.8V/2.5V LVTTL outputs. Selectable interface is controlled by 3-level input
signals that may be hard-wired to appropriate high-mid-low levels.
The IDT5T915 true or complementary outputs can be asynchronously
enabled/disabled. Multiple power and grounds reduce noise.
鈥?Clock and signal distribution
APPLICATIONS:
FUNCTIONAL BLOCK DIAGRAM
TxS
GL
G(+)
OUTPUT
CONTROL
Q1
OUTPUT
CONTROL
Q1
OUTPUT
CONTROL
Q2
RxS
A
A/V
REF
OUTPUT
CONTROL
Q2
OUTPUT
CONTROL
Q3
G(-)
OUTPUT
CONTROL
Q3
OUTPUT
CONTROL
Q4
OUTPUT
CONTROL
Q4
OUTPUT
CONTROL
Q5
OUTPUT
CONTROL
Q5
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
FEBRUARY 2003
DSC-5893/21
漏 2003 Integrated Device Technology, Inc.

IDT5T915相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT [Integ...
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK?
    IDT
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT
  • 英文版
    PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
    IDT [Integ...
  • 英文版
    2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER
    IDT
  • 英文版
    2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER
    IDT [Integ...
  • 英文版
    2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER
    IDT
  • 英文版
    2.5V SINGLE DATA RATE 1:10 CLOCK BUFFER TERABUFFER
    IDT [Integ...
  • 英文版
    2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
    IDT
  • 英文版
    2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
    IDT [Integ...
  • 英文版
    PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
    IDT
  • 英文版
    PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
    IDT [Integ...
  • 英文版
    PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
    IDT
  • 英文版
    PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
    IDT [Integ...
  • 英文版
    1:4 CLOCK BUFFER
    IDT [Integrated...
  • 英文版
    PROGRAMMABLE CLOCK GENERATOR
    IDT
  • 英文版
    PROGRAMMABLE CLOCK GENERATOR
    IDT [Integ...
  • 英文版
    SINGLE OUTPUT CLOCK GENERATOR
    IDT
  • 英文版
    SINGLE OUTPUT CLOCK GENERATOR
    IDT [Integ...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買(mǎi)家服務(wù)：
賣(mài)家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見(jiàn)，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見(jiàn)一經(jīng)采納，將有感恩紅包奉上哦！