Integrated Device Technology, Inc.
CMOS technology. These high-speed, low-power 18-bit reg-
modes. Data flow in each direction is controlled by output-
鈥?/div>
Typical t
SK
(o) (Output Skew) < 250ps
and clock (
CLKAB
and
CLKBA
) inputs. For A-to-B data flow,
鈥?Low input and output leakage
鈮?碌A(chǔ)
(max.)
the device operates in transparent mode when LEAB is HIGH.
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
When LEAB is LOW, the A data is latched if
CLKAB
is held at
> 200V using machine model (C = 200pF, R = 0)
a HIGH or LOW logic level. If LEAB is LOW, the A bus data is
鈥?Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack stored in the latch/flip-flop on the HIGH-to-LOW transition of
CLKAB
. OEAB performs the output enable function on the B
鈥?Extended commercial range of -40擄C to +85擄C
port. Data flow from B port to A port is similar but uses
OEBA
,
鈥?V
CC
= 5V
鹵10%
LEBA and
CLKBA
. Flow-through organization of signal pins
鈥?Features for FCT16500AT/CT/ET:
simplifies layout. All inputs are designed with hysteresis for
鈥?High drive outputs (-32mA I
OH
, 64mA I
OL
)
improved noise margin.
鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
The FCT16500AT/CT/ET are ideally suited for driving
鈥?Typical V
OLP
(Output Ground Bounce) < 1.0V at
high-capacitance loads and low-impedance backplanes. The
V
CC
= 5V, T
A
= 25擄C
output buffers are designed with power off disable capability
鈥?Features for FCT162500AT/CT/ET:
to allow "live insertion" of boards when used as backplane
鈥?Balanced Output Drivers:
鹵24mA
(commercial),
drivers.
鹵16mA
(military)
The FCT162500AT/CT/ET have balanced output drive
鈥?Reduced system switching noise
with current limiting resistors. This offers low ground bounce,
鈥?Typical V
OLP
(Output Ground Bounce) < 0.6V at
minimal undershoot, and controlled output fall times鈥搑educing
V
CC
= 5V,T
A
= 25擄C
the need for external series terminating resistors. The
FCT162500AT/CT/ET are plug-in replacements for the
DESCRIPTION:
FCT16500AT/CT/ET and ABT16500 for on-board bus inter-
The FCT16500AT/CT/ET and FCT162500AT/CT/ET 18- face applications.
FEATURES:
FUNCTIONAL BLOCK DIAGRAM
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
A
1
D
C
B
1
D
C
D
C
D
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
TO 17 OTHER CHANNELS
2548 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
DSC-2548/7
5.9
1
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