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IDT54FCT162H272CTPVB Datasheet

  • IDT54FCT162H272CTPVB

  • FAST CMOS 12-BIT SYNCHRONOUS BUS EXCHANGER

  • 8頁(yè)

  • IDT

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FAST CMOS
12-BIT SYNCHRONOUS
BUS EXCHANGER
Integrated Device Technology, Inc.
IDT54/74FCT162H272AT/CT/ET
FEATURES:
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0.5 MICRON CMOS Technology
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
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1碌A(chǔ) (max.)
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,
15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40擄C to +85擄C
Balanced Output Drivers:
鹵24mA
(commercial)
鹵16mA
(military)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V, T
A
= 25擄C
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull up resistors
DESCRIPTION:
The FCT162H272AT/CT/ET synchronous tri-port bus ex-
changers are high-speed, bidirectional,12-bit, registered, bus
multiplexers for use in synchronous memory interleaving
applications. All registers have a common clock and use a
clock enable (
CE
xxx) on each data register to control data
sequencing. The output enables and mux select (
OEA
,
OEB
and SEL) are also under synchronous control allowing direc-
tion changes to be edge triggered events.
The tri-port bus exchanger has three 12-bit ports. Data may
be transferred between the A port and either/both of the B
ports. The clock enable (
CE1B
,
CE2B
,
CEA1B
and
CEA2B
)
inputs control the data storage. Both B ports have a common
output enable (
OEB
) to aid in synchronously loading the B
registers from the B port.
The FCT162H272AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times-reducing
the need for external series terminating resistors.
The FCT162H272AT/CT/ET have "Bus Hold" which re-
tains the input's last state whenever the input goes to high
impedance. This prevents "floating" inputs and eliminates the
need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
CEA1B
CLK
CE A-1B
REGISTER
Q
D
12
1B
1:12
CE1B
SEL
OEB
OEA
A
1:12
12
CE2B
12
12
CEA2B
M1
U
X0
12
CONTROL
REGISTER
12
CE 1B-A
REGISTER
D
Q
12
CE 2B-A
REGISTER
Q
D
12
CE A-2B
REGISTER
Q
D
12
2B
1:12
3071 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
DSC-3071/3
5.5
1

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