鈥?/div>
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 600ps (max.)
Low CMOS power levels
TTL compatible inputs and outputs
TTL level output voltage swings
High drive: -32mA I
OH
, +48mA I
OL
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
鈥?Available in the following packages:
鈥?Commercial: QSOP, SOIC, SSOP
鈥?Military: CERDIP, LCC
DESCRIPTION:
This buffer/clock driver is built using advanced dual metal CMOS
technology. The FCT805T is a non-inverting clock driver consisting of two
banks of drivers. Each bank drives five output buffers from a standard TTL
compatible input. This part has extremely low output skew, pulse skew, and
package skew. The device has a 鈥渉eart-beat鈥?monitor for diagnostics and
PLL driving. The monitor output is identical to all other outputs and complies
with the output specifications in this document.
The FCT805T is designed for fast, clean edge rates to provide accurate
clock distribution in high speed systems.
FUNCTIONAL BLOCK DIAGRAM
OE
A
IN
A
5
OA
1
-OA
5
IN
B
5
OB
1
-OB
5
OE
B
MON
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
2000
Integrated Device Technology, Inc.
JULY 2000
DSC-4771/2