Power off disable outputs permit 鈥渓ive insertion鈥?/div>
DESCRIPTION:
The IDT29FCT52T is an 8-bit registered transceiver built using an
advanced dual metal CMOS technology. Two 8-bit back-to-back registers
store data flowing in both directions between two bidirectional buses.
Separate clock, clock enable and 3-state output enable signals are provided
for each register. Both A outputs and B outputs are guaranteed to sink 64mA.
FUNCTIONAL BLOCK DIAGRAM
CPA
CEA
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
D
0
CE
D
1
D
2
D
3
D
4
D
5
D
6
D
7
A
Reg.
CP
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
OEB
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
CE
OEA
B
Reg.
D
0
D
1
D
2
D
3
D
4
D
5
D
6
CP D
7
CPB
CEB
INDUSTRIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
AUGUST 2000
DSC-5483/-