鈥?/div>
Supports CPU clks up to 400MHz in test mode.
Uses external 14.318MHz crystal, external crystal load
caps are required for frequency tuning.
Supports undriven differential CPU, SRC pair in PD#
and CPU_STOP# for power management.
Pin Configuration
Functionality
CPU
B6b5 FS_A FS_B MHz
0
0
100
0
MID Ref/N
0
0
1
200
0
1
0
133
1
1
166
1
MID Hi-Z
0
0
200
0
1
400
1
1
0
266
1
1
333
SRC
MHz
100/200
Ref/N
1
100/200
100/200
100/200
Hi-Z
100/200
100/200
100/200
100/200
3V66
MHz
66.66
Ref/N
2
66.66
66.66
66.66
Hi-Z
66.66
66.66
66.66
66.66
PCI
MHz
33.33
Ref/N
3
33.33
33.33
33.33
Hi-Z
33.33
33.33
33.33
33.33
REF U
SB/DOT
MHz
MHz
14.318
48.00
Ref/N
4
Ref/N
5
14.318
48.00
14.318
48.00
14.318
48.00
Hi-Z
Hi-Z
14.318
48.00
14.318
48.00
14.318
48.00
14.318
48.00
REF0
REF1
VDDREF
X1
X2
GND
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDDPCI
GND
PCICLK0
PCICLK1
PCICLK2
PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
PCICLK6
PD#
3V66_0
3V66_1
VDD3V66
GND
3V66_2
3V66_3
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
FS_B
VDDA
GNDA
GND
IREF
FS_A
CPU_STOP#
PCI_STOP#
VDDCPU
CPUCLKT2
CPUCLKC2
GND
CPUCLKT1
CPUCLKC1
VDDCPU
CPUCLKT0
CPUCLKC0
GND
SRCCLKT
SRCCLKC
VDD
Vtt_PWRGD#
VDD48
GND
48MHz_DOT
48MHz_USB
SDATA
3V66_4/VCH
56-pin SSOP & TSSOP
0701G鈥?0/13/04
ICS952601