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ICS951601 Datasheet

  • ICS951601

  • General Purpose Frequency Timing Generator

  • 9頁

  • ICSI

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Integrated
Circuit
Systems, Inc.
ICS951601
Preliminary Product Preview
General Purpose Frequency Timing Generator
Recommended Application:
General Purpose Clock Generator
Output Features:
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17 - PCI clocks selectable,
either 33.33MHz or 66.6MHz @ 3.3V
1 - 48MHz @ 3.3V
1 - REF @ 3.3V, 14.318MHz.
Programable Spread spectrum precentage for EMI control
Uses external 14.318MHz crystal
Select pins for frequency select
PCI 鈥?PCI output skew within same bank @ 33MHz: <170ps
PCI 鈥?PCI output skew within same bank@ 66MHz: <340ps
Cycle to Cycle Jitter PCI @ 33MHz: <200ps
Cycle to Cycle Jitter PCI @ 66MHz: <200ps
Cycle to Cycle Jitter 48MHz: <350ps
Cycle to Cycle Jitter REF: <500ps
Slew Rate: 1.5 - 4 V/ns. (PCI spec.)
Pin Configuration
REF0
VDD
X1
X2
GND
SDATA
SCLK
GNDA
VDDA
SEL1A
PCI1A_0
PCI1A_1
VDD33
GND
PCI1A_2
PCI1A_3
GND
VDD33
PCI1A_4
PCI1A_5
VDD33
GND
PCI1A_6
PCI1A_7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
48MHz
GND
VDD48
SPREAD
VDDA
GNDA
SEL2B
PCI2B_2
PCI2B_1
GND
VDD66
PCI2B_0
SEL2A
PCI2A_2
PCI2A_1
VDD2A
GND
PCI2A_0
SEL1B
PCI1B_2
PCI1B_1
GND
VDD1B
PCI1B_0
Features:
Key Specifications:
48-pin SSOP
*120K ohm pull-up to VDD on indicated inputs.
Block Diagram
PLL2
48MHz
X1
X2
XTAL
OSC
PLL1
Spread
Spectrum
PCI
DIVDER
REF0
8
PCI1A (7:0)
PCI
DIVDER
3
PCI2A (2:0)
SDATA
SCLK
SELA (2:1)
SELB (2:1)
SPREAD
Control
Logic
Config.
Reg.
PCI
DIVDER
3
PCI1B (2:0)
PCI
DIVDER
3
PCI2B (2:0)
Power Groups:
VDDA = Analog Power
GNDA = Analog Ground
0663B鈥?9/04/03
PRODUCT PREVIEW
documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to
change without notice.
ICS951601

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