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ICS951403YGLF-T Datasheet

  • ICS951403YGLF-T

  • AMD-K7 System Clock Chip

  • 18頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS951403
AMD-K7
TM
System Clock Chip
Recommended Application:
ATI chipset with K7 systems
Output Features:
鈥?/div>
3 differential pair open drain CPU clocks (1.5V
external
pull-up; up to 150MHz achieviable through I
2
C)
鈥?/div>
2 - AGPCLK @ 3.3V
鈥?/div>
8 - PCI @3.3V, including 1 free running
鈥?/div>
1 - 48MHz @ 3.3V
鈥?/div>
1 - 24/48MHz @ 3.3V
鈥?/div>
2- REF @3.3V, 14.318MHz.
Features:
鈥?/div>
Programmable ouput frequency
鈥?/div>
Programmable ouput rise/fall time
鈥?/div>
Programmable group skew
鈥?/div>
Real time system reset output
鈥?/div>
Spread spectrum for EMI control typically
by 7dB to 8dB,
with programmable spread percentage
鈥?/div>
Watchdog timer technology to reset system
if over-clocking causes malfunction
鈥?/div>
Uses external 14.318MHz crystal
鈥?/div>
Asyncronous CPU and SDRAM clocks
鈥?/div>
CPU and PCI outputs are aligned
鈥?/div>
CPU - AGP skew <500ps
Pin Configuration
48-Pin SSOP & TSSOP
* Internal 120K pullup resistor on indicated inputs
** Internal 240K pullup resistor on indicated inputs
Block Diagram
PLL2
/2
X1
X2
XTAL
OSC
PLL1
Spread
Spectrum
48MHz
24_48MHz
Functionality
Bit 7 FS2
0
0
REF (1:0)
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU
100.00
100.00
100.00
100.00
133.33
125.00
124.00
133.33
112.00
150.00
111.11
110.00
166.67
90.00
48.00
45.00
SDRAM
100.00
133.33
150.00
66.67
133.33
100.00
124.00
100.00
112.00
150.00
166.67
165.00
166.67
90.00
48.00
60.00
PCICLK
33.33
33.33
30.00
33.33
33.33
31.25
31.00
33.33
33.60
30.00
33.33
33.00
33.33
30.00
32.00
30.00
AGP SEL = AGP SEL =
0
1
66.67
66.67
60.00
66.67
66.67
62.50
62.00
66.67
67.20
60.00
66.67
66.00
66.67
60.00
64.00
60.00
50.00
50.00
50.00
50.00
50.00
50.00
46.50
50.00
56.00
50.00
55.56
55.00
55.56
45.00
48.00
45.00
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
CPU
DIVDER
Stop
3
3
CPUCLKT (2:0)
CPUCLKC (2:0)
SDRAM_OUT
SDRAM
DIVDER
SEL24_48#
SDATA
Control
SCLK
FS (2:0)
PD#
PCI_STOP#
CPU_STOP#
SPREAD#
Config.
Reg.
Logic
AGP
DIVDER
2
PCI
DIVDER
Stop
7
PCICLK (6:0)
PCICLK_F
AGP (1:0)
Power Groups
VDD48, GND48 = 48MHz, PLL2
VDDREF, GNDREF= REF, X1, X2
VDD, GND = PLL Core
0486B鈥?2/23/04

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