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ICS950201FLF-T Datasheet

  • ICS950201FLF-T

  • Programmable Timing Control Hub⑩ for P4⑩

  • 16頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS950201
Programmable Timing Control Hub鈩?for P4鈩?/div>
Recommended Application:
CK-408 clock for Intel
廬
845 chipset with P4 processor.
Output Features:
鈥?/div>
3 Differential CPU Clock Pairs @ 3.3V
鈥?/div>
7 PCI (3.3V) @ 33.3MHz
鈥?/div>
3 PCI_F (3.3V) @ 33.3MHz
鈥?/div>
1 USB (3.3V) @ 48MHz
鈥?/div>
1 DOT (3.3V) @ 48MHz
鈥?/div>
1 REF (3.3V) @ 14.318MHz
鈥?/div>
5 3V66 (3.3V) @ 66.6MHz
鈥?/div>
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
Features:
鈥?/div>
Supports spread spectrum modulation,
down spread 0 to -0.5%.
鈥?/div>
Efficient power management scheme through PD#,
CPU_STOP# and PCI_STOP#.
鈥?/div>
Uses external 14.318MHz crystal
鈥?/div>
Stop clocks and functional control available through
I
2
C interface.
Key Specifications:
鈥?/div>
CPU Output Jitter <150ps
鈥?/div>
3V66 Output Jitter <250ps
鈥?/div>
CPU Output Skew <100ps, programmable over 800 ps
with groups CPU0,1 and CPU2.
Pin Configuration
56-Pin SSOP & TSSOP
* These inputs have 150K internal pull-up resistor to VDD.
Block Diagram
Frequency Table
FS2 FS1 FS0
0
0
0
0
Mid
Mid
Mid
Mid
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CPU
(MHz)
66.66
100.00
200.00
133.33
Tristate
TCLK/2
3V66
(MHz)
66.66
66.66
66.66
66.66
Tristate
TCLK/4
66Buff[2:0]
3V66[4:2]
(MHz)
66.66
66.66
66.66
66.66
Tristate
TCLK/4
PCI_F
PCI
(MHz)
33.33
33.33
33.33
33.33
Tristate
TCLK/8
Reserved
Reserved
Reserved Reserved Reserved
Reserved Reserved Reserved
0460G鈥?8/31/04

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