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ICS9250YG-38-T Datasheet

  • ICS9250YG-38-T

  • Frequency Generator with 200MHz Differential CPU Clocks

  • 18頁(yè)

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS9250-38
Frequency Generator with 200MHz Differential CPU Clocks
Recommended Application:
CK 408 clock for Almador-M mobile chipset with Tualatin
Pin Configuration
PIII processor.
VDDREF
1
56
REF
Output Features:
X1
2
55
FS1
鈥?/div>
3 Differential CPU Clock Pairs @ 3.3V
X2
3
54
FS0
GND
4
53
CPU_STOP#*
鈥?/div>
7 PCI (3.3V) @ 33.3MHz
PCICLK_F0
5
52
CPUCLKT0
PCICLK_F1
6
51
CPUCLKC0
鈥?/div>
3 PCI_F (3.3V) @ 33.3MHz
PCICLK_F2
7
50
VDDCPU
VDDPCI
8
49
CPUCLKT1
鈥?/div>
1 USB (3.3V) @ 48MHz
GND
9
48
CPUCLKC1
PCICLK0
10
47
GND
鈥?/div>
1 DOT (3.3V) @ 48MHz
PCICLK1
11
46
VDDCPU
PCICLK2
12
45
CPUCLKT2
鈥?/div>
1 REF (3.3V) @ 14.318MHz
PCICLK3
13
44
CPUCLKC2
鈥?/div>
1 3V66 (3.3V) @ 66.6MHz
VDDPCI
14
43
MULTSEL0*
GND
15
42
I REF
鈥?/div>
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
PCICLK4
16
41
GND
PCICLK5
17
40
FS2
鈥?/div>
3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN
PCICLK6
18
39
48MHz_USB
VDD3V66
19
38
48MHz_DOT
or 66.6MHz
GND
20
37
VDD48
鈥?/div>
1 66MHz_IN/3V66 (3.3V) @ Input/66MHz
66MHz_OUT0/3V66_2
21
36
GND
66MHz_OUT1/3V66_3
22
35
3V66_1/VCH_CLK
Features:
66MHz_OUT2/3V66_4
23
34
PCI_STOP#*
66MHz_IN/3V66_5
24
33
3V66_0
鈥?/div>
Almador Chipset has a DLL driving the clock buffer
*PD#
25
32
VDD3V66
path for the 3 buffer path 66.6 MHz outputs,
VDDA
26
31
GND
GND
27
30
SCLK
66Buf(0:2).
Vtt_PWRGD#
28
29
SDATA
Almador board level designs MUST use pin 22,
66Buf_1, as the feedback connection from the
clock buffer path to the Almador (GMCH)
56-Pin 300mil SSOP/TSSOP
chipset.
* These inputs have 150K internal pull-up resistor to VDD.
鈥?/div>
Supports spread spectrum modulation,
down spread 0 to -0.5%.
鈥?/div>
Efficient power management scheme through PD#,
CPU_STOP# and PCI_STOP#.
Key Specifications:
鈥?/div>
CPU Output Jitter <150ps
鈥?/div>
3V66 Output Jitter <250ps
鈥?/div>
66MHz Output Jitter (Buffered Mode Only) <100ps
Functionality
鈥?/div>
CPU Output Skew <100ps
Block Diagram
FS2
PLL2
48MHz_USB
48MHz_DOT
X1
X2
66MHz_IN
PLL1
Spread
Spectrum
CPU
DIVDER
Stop
3
3
ICS9250-38
FS1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
CPU
(MHz)
66.66
100.00
200.00
133.33
66.66
100.00
200.00
133.33
Tristate
TCLK/2
3V66
(MHz)
66.66
66.66
66.66
66.66
66.66
66.66
66.66
66.66
Tristate
TCLK/4
66Buff[2:0]
3V66[4:2]
(MHz)
66.66
66.66
66.66
66.66
66MHz_IN
66MHz_IN
66MHz_IN
66MHz_IN
Tristate
TCLK/4
PCI_F
PCI
(MHz)
33.33
33.33
33.33
33.33
66MHz_IN/2
66MHz_IN/2
66MHz_IN/2
66MHz_IN/2
Tristate
TCLK/8
Reserved
Reserved
0
0
0
0
1
1
1
1
Mid
Mid
Mid
Mid
XTAL
OSC
3V66_1/VCH_CLK
REF
CPUCLKT (2:0)
CPUCLKC (2:0)
PCICLK (6:0)
PCICLK_F (2:0)
66MHz_OUT (2:0)
3V66 (5:2,0)
I REF
PCI
DIVDER
Stop
7
3
PD#
CPU_STOP#
PCI_STOP#
MULTSEL0
FS (2:0)
SDATA
SCLK
Control
Logic
66MHz
DIVDER
3V66
DIVDER
3
5
Config.
Reg.
Reserved Reserved Reserved
Reserved Reserved Reserved
0404B鈥?2/23/02

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