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ICS9248F-128 Datasheet

  • ICS9248F-128

  • Peripheral IC

  • 16頁

  • ETC

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Integrated
Circuit
Systems, Inc.
ICS9248-128
Frequency Generator & Integrated Buffers
Recommended Application:
SIS 530/620 style chipset
Output Features:
鈥?/div>
- 3 CPU @ 2.5V/3.3V up to 133.3 MHz.
鈥?/div>
- 6 PCI @ 3.3V (including 1 free-running)
鈥?/div>
- 13 SDRAMs @ 3.3V up to 133.3MHz.
鈥?/div>
- 3 REF @ 3.3V, 14.318MHz
鈥?/div>
- 1 clock @ 24/14.3 MHz selectable output for SIO
鈥?/div>
- 1 Fixed clock at 48MHz (3.3V)
鈥?/div>
- 1 IOAPIC @ 2.5V / 3.3V
Features:
鈥?/div>
Up to 133MHz frequency support
鈥?/div>
Support power management: CPU, PCI, SDRAM stop and
Power down Mode from I
2
C programming.
鈥?/div>
Spread spectrum for EMI control ( 鹵 0.25% center spread
& 0 to -0.5% down spread).
鈥?/div>
Uses external 14.318MHz crystal
鈥?/div>
FS pins for frequency select
Key Specifications:
鈥?/div>
CPU 鈥?CPU<175ps
鈥?/div>
SDRAM 鈥?SDRAM < 350ps
鈥?/div>
CPU鈥揝DRAM < 500ps
鈥?/div>
CPU(early) 鈥?PCI : 1-4ns (typ. 2ns)
鈥?/div>
PCI 鈥?PCI <500ps
Pin Configuration
VDDR/X
*MODE/REF0
GNDREF
X1
X2
VDDPCI
*FS1/PCICLK_F
*FS2.PCICLK0
GNDPCI
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
SDRAM12
GNDSDR
*CPU_STOP# /SDRAM11
*PCI_STOP# /SDRAM10
VDDSD/C
*SDRAM_STOP# /SDRAM9
*PD# /SDRAM8
GNDFIX
SDATA
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VDDLAPIC
IOAPIC
REF1/SD_SEL#*
GNDLAPIC
REF2/CPU2.5_3.3#*
CPUCLK1
VDDLCPU
CPUCLK2
CPUCLK3
GNDCPU
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GNDSDR
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
GNDSDR
48MHz/FS0*
SIO/SEL24_14#MHz*
48-Pin SSOP
* Internal Pull-up Resistor of
120K to 3.3V on indicated inputs
Block Diagram
PLL2
/2
SEL24_14#
X1
X2
XTAL
OSC
PLL1
Spread
Spectrum
MODE
FS(2:0)
CPU3.3#_2.5
SD_SEL#
REF(2:0)
IOAPIC
STOP
Functionality
48MHz
SIO
ICS9248-128
CPU
MHZ
SD_SEL FS2
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SDRAM
MHZ
90.00
100.05
63.33
66.66
75.00
74.66
82.66
97.00
66.70
75.00
83.30
95.00
100.00
112.00
124.00
133.30
PCI
MHZ
30.00
33.35
31.66
33.33
30.00
37.33
31.00
32.33
33.35
30.00
33.32
31.66
33.33
37.33
31.00
33.33
3
3
CPUCLK (3:1)
SDRAM (12:0)
PCICLK (4:0)
PCICLK_F
CPU_STOP
LATCH
13
PCI
CLOCK
DIVDER
3
5
POR
STOP
5
SDRAM_STOP#
CPU_STOP#
PCI_STOP#
PD#
SDATA
SCLK
Control
Logic
Config.
Reg.
PCI_STOP
90.00
66.70
95.00
100.00
100.00
112.00
124.00
97.00
66.70
75.00
83.30
95.00
100.00
112.00
124.00
133.30
Note:
REF, IOAPIC = 14.318MHz
9248-128 Rev B 11/16/00
Third party brands and names are the property of their respective owners.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.

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