鈥?/div>
For group skew specifications, please refer to group
timing relationship.
Pin Configuration
48-Pin 300mil SSOP
* These inputs have a 120K pull up to VDD.
** 60K pull-up to VDD on indicated input
1 These are double strength.
Block Diagram
Functionality
FS3 FS2 FS1 FS0
CPU
(MHz)
SDRAM
(MHz)
3V66
(MHz)
PCICLK
(MHz)
I OA P I C
1=PCICLK/2
I OA P I C
0=PCICLK
(MHz)
(MHz)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
66.80
68.00
100.30
103.00
133.73
145.00
133.73
137.33
140.00
140.00
118.00
124.00
133.70
137.00
150.00
72.50
100.20
102.00
100.30
103.00
100.30
108.75
100.30
103.00
105.00
140.00
118.00
124.00
133.70
137.00
112.50
108.75
66.80
68.00
66.87
68.67
66.87
72.50
66.87
68.67
70.00
93.33
78.67
82.67
89.13
91.33
75.00
72.50
33.40
34.00
33.43
34.33
33.43
36.25
33.43
34.33
35.00
46.67
39.33
41.33
44.57
45.67
37.50
36.25
16.70
17.00
16.72
17.17
16.72
18.13
16.72
17.17
17.50
23.33
19.67
20.67
22.28
22.83
18.75
18.13
33.40
34.00
33.43
34.33
33.43
36.25
33.43
34.33
35.00
46.67
39.33
41.33
44.57
45.67
37.50
36.25
Additional frequencies selectable through I
2
C programming.
9248- 96 Rev A 2/7/00
Third party brands and names are the property of their respective owners.
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.