Integrated
Circuit
Systems, Inc.
ICS9248-143
Frequency Generator & Integrated Buffers for PENTIUM
II/III
TM
& K6
Recommended Application:
440BX, MX, VIA Apollo Pro 133, Apollo Pro Media
or MVP4 style chip set, for Note book applications.
Output Features:
聲
4 - CPUs @ 2.5V/3.3V
including 1 free running CPUCLK_F
聲
9 - SDRAM @ 3.3V
聲
7 - PCI @ 3.3V, including 1 free running PCICLK_F
聲 1 - PCI Early @ 3.3V
聲
1 - 48MHz, @ 3.3V fixed.
聲
1 - 24/48MHz @ 3.3V
聲
2 - REF @3.3V, 14.318MHz.
Features:
聲 Up to 137MHz frequency support
聲 97MHz to support high-end AMD processor.
聲 Support power management: CLK, PCI, stop and Power
down Mode from I
2
C programming.
聲 Spread spectrum for EMI control
(鹵.25% & 0 to -0.5% down spread).
聲 Uses external 14.318MHz crystal
聲 FS pins for frequency select
Key Specifications:
聲 CPU Output Jitter @ 2.5V: <300ps
聲 CPU Output Jitter @ 3.3V: <250ps
聲 PCI Output Jitter @ 3.3V: <250ps
聲 CPU Output Skew @ 2.5V: <175ps
聲 CPU Output Skew @ 3.3V: <175ps
聲 PCI Output Skew @ 3.3V: <500ps
聲 PCI Early to PCI Skew @ 3.3V: typ = 3ns
Pin Configuration
VDDREF
*SPREAD/REF0
GNDREF
X1
X2
VDDPCI
*CPU2.5_3.3#/PCICLK_F
*FS3/PCICLK0
GNDPCI
*SEL24_48#/PCICLK1
*SELPCIE_6#/PCICLK2
PCICLK3
PCICLK4
VDDPCI
BUFFER IN
GNDPCI
PCICLK5
PCICLK6/PCICLK_E
VDDCOR
PCI_STOP#
*PD#
GND48
SDATA
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF1/FS2*
VDDLCPU
CPUCLK_F
CPUCLK0
GNDLCPU
CPUCLK1
CPUCLK2
CLK_STOP#
GNDSDR
SDRAM_F
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GNDSDR
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
VDD48
48MHz/FS0*
24_48MHz/FS1*
48-Pin SSOP and TSSOP
* Internal Pull-up Resistor of 120K to VDD
Functionality
FS3
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
CPU
(MHz)
66.67
100.00
100.30
133.33
105.00
133.37
137.00
75.00
100.00
95.00
97.00
133.33
90.00
96.22
66.82
91.50
PCI
(MHz)
33.33
33.33
33.43
33.33
35.00
33.34
34.25
37.50
33.33
31.67
32.33
33.33
30.00
32.07
33.41
30.50
Block Diagram
PLL2
48MHz
/2
X1
X2
BUFFER IN
CPUCLK_F
PLL1
Spread
Spectrum
FS(0:3)
4
SEL24_48#
STOP
24_48MHz
2
XTAL
OSC
REF[1:0]
3
CPUCLK [2:0]
LATCH
STOP
8
SDRAM [7:0]
SDRAM_F
4
POR
CLK_STOP#
PCI_STOP#
CPU2.5_3.3#
SDATA
SCLK
PD#
Control
Logic
Config.
Reg.
PCI
CLOCK
DIVDER
STOP
6
PCICLK [5:0]
PCICLK_F
PCICLK_E
Pentium is a trademark of Intel Corporation
I
2
C is a trademark of Philips Corporation
9248-143 Rev C 7/26/00
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
ICS9248-143