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ICS9248-127 Datasheet

  • ICS9248-127

  • Frequency Generator & Integrated Buffers for PENTIUM/ProTM

  • 282.32KB

  • 14頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS9248-127
Frequency Generator & Integrated Buffers for PENTIUM/Pro
TM
General Description
The
ICS9248-127
is the single chip clock solution for Desktop
designs using the VIA MVP4 and Aladdin 7 style chipset. It
provides all necessary clock signals for such a system.
Spread spectrum may be enabled through I
2
C programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting to
board design iterations or costly shielding. The
ICS9248-
127
employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Up to 124MHz frequency support.
Spread Spectrum for EMI control 0 to -0.5% down
spread and 鹵0.25% center spread
Serial I
2
C interface for Power Management,
Frequency Select, Spread Spectrum.
Provides the following system clocks
- 4-CPUs @ 3.3V, up to 124MHz.
- 13-SDRAMs @3.3V, up to 124MHz
(including SDRAM_F)
- 6-PCI (including 1 free running, PCICLK_F)
@3.3V, CPU/2 or CPU/3.
- 1-24MHz @3.3V fixed.
- 1-48MHz @3.3V fixed.
- 2-REF @3.3V, 14.318MHz.
Efficient Power management scheme through PCI
and STOP CLOCKS.
鈥?/div>
Block Diagram
PLL2
/2
X1
X2
BUFFER IN
CPUCLK_F
PLL1
Spread
Spectrum
FS(3:0)
MODE
4
STOP
48MHz
24MHz
REF (1:0)
Pin Configuration
VDDREF
*PCI_STOP#/REF0
GND
X1
X2
VDDPCI
*MODE/PCICLK_F
*FS3/PCICLK0
GND
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
BUFFER IN
GND
SDRAM11
SDRAM10
VDDSDR
SDRAM9
SDRAM8
GND
SDATA
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF1/FS2*
VDDCPU
CPUCLK_F
CPUCLK0
GND
CPUCLK1
CPUCLK2
CLK_STOP#
GND
SDRAM_F
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
VDD48
48MHz/FS0*
24MHz/FS1*
XTAL
OSC
2
3
CPUCLK (2:0)
LATCH
STOP
12
SDRAM (11:0)
SDRAM_F
4
POR
CLK_STOP#
PCI_STOP#
SDATA
SCLK
Control
Logic
Config.
Reg.
PCI
CLOCK
DIVDER
STOP
5
PCICLK (4:0)
PCICLK_F
48-Pin SSOP
* Internal Pull-up Resistor of 240K to VDD
Power Groups
VDDCPU, GNDCPU = CPUCLKS, CPUCLK_F
VDDSDR, GNDSDR = SDRAMCLKS, SDRAM_F
VDDPCI, GNDPCI = PCICLKS, PCICLK_F
VDD48 = 48MHz, 24MHz
VDDREF, GNDREF = REF, X1, X2
9248-127 Rev C 8/18/00
Pentium is a trademark of Intel Corporation
I
2
C is a trademark of Philips Corporation
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
ICS9248-127

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