鈥?/div>
Features
Genreates AUDIO codec and UART clocks
synchronized to the 27MHz recovered video clock
Selectable AUDIO clock supports 256x and 384x
over-sampling of 16.00, 22.05, 24.00, 32.00, 44.10
and 48.00 kHz
80ps one sigma jitter maintains 16 bit performance
Output rise/fall times less than 1.5nS
On chip loop filter components
3.0V - 5.5V supply range
8-pin, 150-mil SOIC package
Pin Configuration
Applications
鈥?/div>
Specifically designed to support the high
performance clocking requirements of digital video
Functionality
VDD=3.0-5.5V, TEMP=0-70擄
REF
(MHz)
27.00
27.00
27.00
27.00
27.00
27.00
27.00
27.00
FS
[2:0]
000
001
010
011
10 0
101
11 0
11 1
AUDIO
03
(MHz)
Tristate
256*16.00
256*22.05
256*24.00
256*32.00
256*44.10
256*48.00
Low
AUDIO
04
(MHz)
Tristate
384*16.00
384*22.05
384*24.00
384*32.00
384*44.10
384*48.00
Low
UART
(MHz)
Tristate
1.8620
1.8620
1.8620
1.8620
1.8620
1.8620
Low
8-Pin SOIC
ICS9118-04 Obsolete
Block Diagram
9118-03 9118-04 RevB 7/28/99
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
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