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ICS8701CYIT Datasheet

  • ICS8701CYIT

  • LOW SKEW ±1, ±2 CLOCK GENERATOR

  • 13頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS8701I
L
OW
S
KEW
賂
1,
賂
2
C
LOCK
G
ENERATOR
F
EATURES
鈥?20 LVCMOS outputs, 7
W
typical output impedance
鈥?Output frequency up to 250MHz
鈥?200ps bank skew, 250ps output skew, 300ps multiple
frequency skew, 600ps part-to-part skew
鈥?LVCMOS / LVTTL clock input
鈥?LVCMOS control inputs
鈥?Bank enable logic allows unused banks to be disabled
in reduced fanout applications
鈥?3.3V or mixed 3.3V input, 2.5V output operating
supply modes
鈥?48 lead low-profile QFP (LQFP), 7mm x 7mm x 1.4mm
package body, 0.5mm package lead pitch
鈥?-40擄C to 85擄C ambient operating temperature
鈥?Other divide values available on request
G
ENERAL
D
ESCRIPTION
The ICS8701I is a low skew, 梅1, 梅2 Clock Gen-
erator and a member of the HiPerClockS鈩?/div>
HiPerClockS鈩?/div>
family of High Performance Clock Solutions
from ICS. The low impedance LVCMOS out-
puts are designed to drive 50
W
series or par-
allel terminated transmission lines. The effective fanout can
be increased from 20 to 40 by utilizing the ability of the
outputs to drive two series terminated lines.
,&6
The divide select inputs, DIV_SELx, control the output fre-
quency of each bank. The outputs can be utilized in the 梅1,
梅2 or a combination of 梅1 and 梅2 modes. The bank enable
inputs, BANK_EN0:1, support enabling and disabling each
bank of outputs individually. The master reset input, nMR/
OE, resets the internal frequency dividers and also con-
trols the active and high impedance states of all outputs.
The ICS8701I is characterized at 3.3V and mixed 3.3V in-
put supply, and 2.5V output supply operating modes. Guar-
anteed bank, output and part-to-part skew characteristics
make the ICS8701I ideal for those clock distribution appli-
cations demanding well defined performance and repeat-
ability.
B
LOCK
D
IAGRAM
LVCMOS_CLK
P
IN
A
SSIGNMENT
GND
QB2
GND
QB3
VDDO
QB4
QC0
VDDO
QC1
GND
QC2
GND
賂
1
賂
2
1
QAO - QA4
0
QC3
VDDO
QC4
QD0
VDDO
QD1
GND
QD2
GND
QD3
VDDO
QD4
DIV_SELA
1
QB0 - QB4
0
DIV_SELB
1
QC0 - QC4
0
DIV_SELC
1
QD0 - QD4
0
DIV_SELD
nMR/OE
BANK_EN0
BANK_EN1
Bank Enable
Logic
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
31
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23
24
ICS8701I
QB1
VDDO
QB0
QA4
VDDO
QA3
GND
QA2
GND
QA1
VDDO
QA0
8701I
www.icst.com/products/hiperclocks.html
1
DIV_SELA
DIV_SELB
LVCMOS_CLK
GND
VDDI
BANK_EN0
GND
BANK_EN1
VDDI
nMR/OE
DIV_SELC
DIV_SELD
48-Pin LQFP
Y Package
Top View
REV. A MARCH 16, 2001

ICS8701CYIT相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER
    ICS
  • 英文版
    LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER
    ICST [Inte...
  • 英文版
    LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER
    ICSI
  • 英文版
    LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER
    ICST [Inte...
  • 英文版
    LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS...
    ICS
  • 英文版
    LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS...
    ICST [Inte...
  • 英文版
    LOW SKEW, 1-TO-12 LVCMOS / LVTTL FANOUT BUFFER
    ICSI
  • 英文版
    LOW SKEW, 1-TO-12 LVCMOS / LVTTL FANOUT BUFFER
    ICST [Inte...
  • 英文版
    LOW SKEW, 1-TO-16, LVCMOS / LVTTL FANOUT BUFFER W/1.2V LVCMO...
    ICST [Inte...
  • 英文版
    Low Skew 1-to-16 Fanout Buffer
    ICS
  • 英文版
    Low Skew 1-to-16 Fanout Buffer
    ICST [Inte...
  • 英文版
    LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
    ICS
  • 英文版
    LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
    ICST [Inte...
  • 英文版
    350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER
    ICS
  • 英文版
    350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER
    ICST [Integrate...
  • 英文版
    700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SY...
    ICSI
  • 英文版
    700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SY...
    ICST [Integrate...
  • 英文版
    Low Skew 1-to-16 Differential Current Mode Fanout Buffer
    ICS
  • 英文版
    Low Skew 1-to-16 Differential Current Mode Fanout Buffer
    ICST [Integrate...
  • 英文版
    LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CH...
    ICS

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