HiPerClockS鈩?/div>
LVPECL fanout buffer and a member of the
HiPerClockS鈩?family of High Performance Clock
Solutions from ICS. The ICS8533-11 has select-
able differential clock or crystal inputs. The CLK, nCLK pair
can accept most standard differential input levels. The clock
enable is internally synchronized to eliminate runt pulses on
the outputs during asynchronous assertion/deassertion of the
clock enable pin.
,&6
Guaranteed output and part-to-part skew characteristics
make the ICS8533-11 ideal for those applications demand-
ing well defined performance and repeatability.
B
LOCK
D
IAGRAM
CLK_EN
D
Q
LE
CLK
nCLK
XTAL1
XTAL2
0
1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
P
IN
A
SSIGNMENT
V
EE
CLK_EN
CLK_SEL
CLK
nCLK
XTAL1
XTAL2
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
CLK_SEL
ICS8533-11
20-Lead TSSOP
6.5mm x 4.4mm x 0.92 Package Body
G Package
Top View
8533AG-11
www.icst.com/products/hiperclocks.html
1
REV. D
JULY 16, 2001