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ICS843004AG Datasheet

  • ICS843004AG

  • FEMTOCLOCKS⑩ LVCMOS/CRYSTAL-TO- 3.3V LVPECL FREQUENCY SYNTH...

  • 16頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS843004
F
EMTO
C
LOCKS
鈩VCMOS/C
RYSTAL
-
TO
-
3.3V LVPECL F
REQUENCY
S
YNTHESIZER
F
EATURES
鈥?Four 3.3V LVPECL outputs
鈥?Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
鈥?Supports the following output frequencies: 212.5MHz,
187.5MHz, 159.375MHz, 156.25, 106.25MHz, 53.125MHz
鈥?VCO range: 560MHz - 680MHz
鈥?RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal
(637KHz - 10MHz): 0.72ps (typical)
鈥?RMS phase noise at 212.5MHz (typical)
Phase noise:
Offset
Noise Power
100Hz ............... -95.0 dBc/Hz
1KHz .............. -114.3 dBc/Hz
10KHz .............. -123.8 dBc/Hz
100KHz .............. -124.6 dBc/Hz
鈥?Full 3.3V supply mode
鈥?-30擄C to 85擄C ambient operating temperature
G
ENERAL
D
ESCRIPTION
The ICS843004 is a 4 output LVPECL synthesizer
optimized to generate Fibre Channel reference
HiPerClockS鈩?/div>
clock frequencies and is a member of the
HiPerClocks
TM
family of high performance clock
solutions from ICS. Using a 26.5625MHz 18pF
parallel resonant crystal, the following frequencies can be
generated based on the 2 frequency select pins (F_SEL[1:0]):
212.5MHz, 187.5MHz, 159.375MHz, 156.25, 106.25MHz, and
53.125MHz. The ICS843004 uses ICS鈥?3
rd
generation low phase
noise VCO technology and can achieve 1ps or lower typical
rms phase jitter, easily meeting Fibre Channel jitter requirements.
The ICS843004 is packaged in a small 24-pin TSSOP package.
ICS
F
REQUENCY
S
ELECT
F
UNCTION
T
ABLE
Input
Frequency
26.5625
26.5625
26.5625
26.5625
26.04166
23.4375
Inputs
M Divider
F_SEL1 F_SEL0
Value
0
0
24
0
1
1
0
0
1
0
1
1
0
24
24
24
24
24
N Divider
Value
3
4
6
12
4
3
M/N
Divider Value
8
6
4
2
6
8
Output
Frequency
(MHz)
212.5
159.375
106.25
53.125
156.25
187.5
P
IN
A
SSIGNMENT
nQ1
Q1
V
CC
o
Q0
nQ0
MR
nPLL_SEL
nc
V
CCA
F_SEL0
V
CC
F_SEL1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
nQ2
Q2
V
CCO
Q3
nQ3
V
EE
nc
nXTAL_SEL
TEST_CLK
V
EE
XTAL_IN
XTAL_OUT
ICS843004
B
LOCK
D
IAGRAM
F_SEL[1:0]
Pulldown
nPLL_SEL
Pulldown
TEST_CLK
Pulldown
26.5625MHz
2
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
Q0
1
F_SEL[1:0]
0 0 梅3
0 1 梅4
1 0 梅6
1 1 梅12
1
nQO
Q1
nQ1
XTAL_IN
OSC
XTAL_OUT
nXTAL_SEL
Pulldown
0
Phase
Detector
VCO
637.5MHz
(w/26.5625MHz
Reference)
0
Q2
nQ2
M = 24 (fixed)
Q3
nQ3
MR
843004AG
Pulldown
www.icst.com/products/hiperclocks.html
1
REV. A NOVEMBER 18, 2004

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