ICS553
L
OW
S
KEW
1
TO
4 C
LOCK
B
UFFER
Description
The ICS553 is a low skew, single input to four output,
clock buffer. Part of ICS鈥?Clock Blocks
TM
family, this is
our lowest skew, small clock buffer. See the ICS552-02
for a 1 to 8 low skew buffer. For more than 8 outputs
see the MK74CBxxx Buffalo
TM
series of clock drivers.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Extremely low skew outputs (50ps maximum)
Packaged in 8 pin SOIC
Low power CMOS technology
Operating Voltages of 2.5 to 5V
Output Enable pin tri-states outputs
5V tolerant input clock
Block Diagram
Q0
Q1
IC LK
Q2
Q3
O utput E nable
MDS 553 B
In tegr ated C ir cu it S yst ems
q
1
5 25 Ra ce Str eet, San Jose, C A 95 126
q
Revision 052501
tel ( 408) 2 95-9 800
q
www. i c s t. c om
ICS553相關型號PDF文件下載
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英文版
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IDT [Integ...
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英文版
PRELIMINARY INFORMATION PLL Clock Divider
ICS
1
2
3
4
5
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