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IBM11N4645CB-60J Datasheet

  • IBM11N4645CB-60J

  • x64 EDO Page Mode DRAM Module

  • 452.48KB

  • 31頁

  • ETC

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Discontinued (9/98 - last order; 3/99 last ship)
IBM11M4730C4M x 72 E12/10, 5.0V, Au.
IBM11N4645BB IBM11N4735BB
IBM11N4645CB IBM11N4735CB
4M x 64/72 DRAM Module
Features
鈥?168 Pin JEDEC Standard, Unbuffered 8 Byte
Dual In-line Memory Module
鈥?4Mx64, 4Mx72 Extended Data Out Page Mode
DIMM
S
鈥?Performance:
t
RAC
RAS Access Time
t
CAC
CAS Access Time
t
AA
t
RC
Access Time From Address
Cycle Time
-50
50ns
13ns
25ns
84ns
20ns
-60
60ns
15ns
30ns
104ns
25ns
鈥?System Performance Bene鏗乼s:
-Non buffered for increased performance
-Reduced noise (35 V
SS
/V
CC
pins)
-Byte write, byte read accesses
-Serial PDs
鈥?Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
鈥?Refresh Modes: RAS-Only, CBR and Hidden
Refresh
鈥?2048 refresh cycles distributed across 32ms
(11/11 addressing)
鈥?4096 refresh cycles distributed across 64ms
(12/10 addressing)
鈥?11/11 or 12/10 addressing (Row/Column)
鈥?Card size: 5.25" x 1.0" x 0.354"
鈥?DRAMS in SOJ Package
t
HPC
EDO Mode Cycle Time
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Inputs and outputs are LVTTL (3.3V) compatible
Single 3.3V
鹵
0.3V Power Supply
Au contacts
Optimized for byte-write non-parity, or ECC
applications
Description
IBM11N4645BB/IBM11N4645CB are industry stan-
dard 168-pin 8-byte Dual In-line Memory Modules
(DIMMs) which are organized as 4Mx64 and 4Mx72
high speed memory arrays designed with EDO
DRAMs for non-parity or ECC applications. The
DIMMs use 16 (x64) or 18 (x72) 4Mx4 EDO DRAMs
in SOJ packages. The use of EDO DRAMs allows
for a reduction in Page Mode Cycle time from 40ns
(Fast Page) to 20ns for 50ns DRAM modules.
The DIMMs use serial presence detects imple-
mented via a serial EEPROM using the two pin I
2
C
protocol. This communication protocol uses Clock
(SCL) and Data I/O (SDA) lines to synchronously
clock data between the master (system logic) and
the slave EEPROM device (DIMM). The EEPROM
device address pins (SA0-2) are brought out to the
DIMM tabs to allow 8 unique DIMM/EEPROM
addresses. The first 128 bytes are utilized by the
DIMM manufacturer and the second 128 bytes of
serial PD data are available to the customer.
All IBM 168-pin DIMMs provide a high performance,
flexible 8-byte interface in a 5.25鈥?long space-saving
footprint. Related products include the buffered
DIMMs (x64 non- parity and x72 ECC Optmized) for
applications which can benefit from the on-card buff-
ers.
Card Outline
(Front)
(Back)
1
85
10 11
94 95
40 41
124 125
84
168
50H8036.E22441E
Revised 5/98
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漏IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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