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IBM0116160PT3-50 Datasheet

  • IBM0116160PT3-50

  • x16 Fast Page Mode DRAM

  • 27頁

  • ETC

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Discontinued (9/98 - last order; 3/99 last ship)
IBM01161601M x 1612/8, 5.0VMMDD35DSU-011010627. IBM0116160P1M x 1612/8, 3.3V, LP, SRMMDD35DSU-011010627. IBM0116160M 1M x 1612/8, 5.0V, LP, SRMMDD35DSU-011010627. IBM011616B1M x 1612/8, 3.3VMMDD35DSU-011010627.
IBM0116160 IBM0116160M
IBM0116160B IBM0116160P
1M x 16 12/8 DRAM
Features
鈥?1,048,576 word by 16 bit organization
鈥?Single 3.3V
鹵
0.3V or 5.0V
鹵
0.5V power supply
鈥?Standard Power (SP) and Low Power (LP)
鈥?4096 Refresh Cycles
- 64 ms Refresh Rate (SP version)
- 256 ms Refresh Rate (LP version)
鈥?High Performance:
-50
t
RAC
RAS Access Time
t
CAC
CAS Access Time
t
AA
Column Address Access Time
t
RC
Cycle Time
t
PC
Fast Page Mode Cycle Time
50
13
25
95
35
-60
60
15
30
110
40
Units
ns
ns
ns
鈥?Low Power Dissipation
- Active (max) - 50 mA / 45 mA
- Standby: TTL Inputs (max) - 2.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
- 0.1 mA (LP version)
- Self Refresh (LP version only)
- 200碌A(chǔ) (3.3 Volt)
- 300碌A(chǔ) (5.0 Volt)
鈥?2 CAS
鈥?Fast Page Mode
鈥?Read-Modify-Write
鈥?RAS Only and CAS before RAS Refresh
鈥?Hidden Refresh
ns
ns
鈥?Package: TSOP-II 50/44 (400mil x 825mil)
SOJ 42/42 (400mil)
Description
The IBM0116160 is a dynamic RAM organized
1,048,576 words by 16 bits, which has a very low
鈥渟leep mode鈥?power consumption option. These
devices are fabricated in IBM鈥檚 advanced 0.5碌m
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V
鹵
0.3V or 5.0V
鹵
0.5V power supply. The 20
addresses required to access any bit of data are
multiplexed (12 are strobed with RAS, 8 are strobed
with CAS).
Pin Assignments
(Top View)
50/44 TSOP
V
CC
IO0
IO1
IO2
IO3
V
CC
IO4
IO5
IO6
IO7
NC
NC
NC
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
36
35
34
33
32
31
30
29
28
27
26
V
SS
IO15
IO14
IO13
IO12
V
SS
IO11
IO10
IO9
IO8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
IO0
IO1
IO2
IO3
V
CC
IO4
IO5
IO6
IO7
NC
NC
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
Pin Description
42/42 SOJ
RAS
V
SS
IO15
IO14
IO13
IO12
V
SS
IO11
IO10
IO9
IO8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
V
SS
Row Address Strobe
L/U Column Address Strobe
Read/Write Input
Address Inputs
Output Enable
Data Input/Output
Power (+3.3V or +5.0V)
Ground
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
LCAS / UCAS
WE
A0 - A11
OE
I/O0 - I/O15
V
CC
V
SS
43G9618
SA14-4207-06
Revised 4/97
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漏IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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