鈥?/div>
4 Kbytes SRAM
128 Kbytes EEPROM
Additional 32x32 multiply instruction
Hardware random number generator
30 MHz Clock Rate
5V and 3.3V versions planned
Sixteen 16-bit general registers
Flexible instruction set built on 62 basic instruction types
8/16/32-bit data transfer, arithmetic, and logic instructions
Signed and unsigned multiply and divide instructions
Extensive bit manipulation instructions
Bus controller with 8-bit access
3-function refresh controller
DMA controller with short or full address mode
16-bit integrated timer unit (ITU) with 5 channels
Programmable timing pattern controller (TPC)
Watchdog timer
Serial communications interface (SCI) with built-in smart card interface
Eight 10-bit A/D converter channels
Two 8-bit D/A converter channels
Clock pulse generator
Interrupt controller with 37 sources
Seventy input/output pins and eight input-only pins
Available in 100 pin QFP package
The IAH8/3048 is code compatible with the original Hitachi廬 H8/300H family of
microcontrollers, with additional security enhancements designed into the device. innovASIC
produces replacement ICs using its MILES
TM
, or Managed IC Lifetime Extension System, cloning
technology. This technology produces replacement ICs far more complex than "emulation" while
ensuring they are compatible with the original IC. MILES
TM
captures the design of a clone so it
can be produced even as silicon technology advances. MILES
TM
also verifies the clone against the
original IC so that even the "undocumented features" are duplicated.
This Advanced Information Sheet contains preliminary information for this the IAH8/3048. The
complete data sheet which documents all necessary engineering information about the IAH8/3048
including functional and I/O descriptions, electrical characteristics, and applicable timing will be
available when the device nears completion.
Copyright
漏
2001
innovASIC
www.innovasic.com
Customer Support:
The End of Obsolescence鈩?/div>
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1-888-824-4184
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