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HYM7V75AC801BTHG Datasheet

  • HYM7V75AC801BTHG

  • 8Mx72|3.3V|P/S|x9|SDR SDRAM - Registered DIMM 64MB

  • 14頁

  • ETC

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8Mx72 bits
PC100 SDRAM Registered DIMM
with PLL, based on 8Mx8 SDRAM with LVTTL, 4 banks & 4K Refresh
HYM7V75AC801B H-Series
DESCRIPTION
The Hynix HYM7V75AS801B H-Series are 8Mx72bits ECC Synchronous DRAM Modules. The modules are composed
of nine 8Mx8bit CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, two 18bits driver ICs in 56pin TSSOP
package, one PLL clock driver in 24pin TSSOP package and one 2Kbit EEPROM in 8pin TSSOP package on a 168pin
glass-epoxy printed circuit board. A 0.22uF and two 0.0022uF decoupling capacitors per each SDRAM are mounted on
the PCB.
The HYM7V75AS801B H-Series are Dual In-line Memory Modules suitable for easy interchange and addition of
64Mbytes memory. The HYM7V75AS801B H-Series are offering fully synchronous operation referenced to a positive
edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are
internally pipelined to achieve very high bandwidth. The DIMM /CAS latency in registered mode is one clock later than
the device /CAS latency because of the register.
FEATURES
鈥?/div>
PC100MHz support
鈥?/div>
168pin SDRAM Registered DIMM
鈥?/div>
Serial Presence Detect with EEPROM
鈥?/div>
1.50鈥?(38.10mm) Height PCB with Double Sided
components
鈥?/div>
Single 3.3
鹵
0.3V power supply
鈥?/div>
All devices pins are compatible with LVTTL interface
鈥?/div>
Data mask function by DQM
鈥?/div>
SDRAM internal banks : four banks
鈥?/div>
Module bank : one physical bank
鈥?/div>
Auto refresh and self refresh
鈥?/div>
4096 refresh cycles / 64ms
鈥?/div>
Programmable Burst Length and Burst Type
-. 1, 2, 4, 8, or Full Page for Sequential Burst
-. 1, 2, 4 or 8 for Interleave Burst
鈥?/div>
Programmable /CAS Latency : 2, 3 Clocks
-. 1, 2, 4, 8, or Full Page for Sequential Burst
-. 1, 2, 4 or 8 for Interleave Burst
ORDERING INFORMATION
PART NO.
HYM7V75AC801BTHG-8
HYM7V75AC801BTHG-10P
HYM7V75AC801BTHG-10S
MAX.
FREQUENCY
125MHz
100MHz
100MHz
4 Banks
4K
Normal
TSOP-II
Gold
INTERNAL
BANK
REF.
POWER
SDRAM
PACKAGE
PLATING
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not
assume any responsibility for use of circuits described. No patent licenses are implied.
1
Rev. 0.2/Dec. 01

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