16Mx72 bits
with PLL, based on 16Mx4 SDRAM with LVTTL, 4 banks & 4K Refresh
HYM7V75AC1601B N-Series
DESCRIPTION
The Hynix HYM7V75AS1601B N-Series are 16Mx72bits ECC Synchronous DRAM Modules. The modules are
composed of eighteen 16Mx4bit CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, two 18bits driver ICs in
56pin TSSOP package, one PLL clock driver in 24pin TSSOP package and one 2Kbit EEPROM in 8pin TSSOP package
on a 168pin glass-epoxy printed circuit board. A 0.22uF and a 0.0022uF decoupling capacitors per each SDRAM are
mounted on the PCB.
The HYM7V75AS1601B N-Series are Dual In-line Memory Modules suitable for easy interchange and addition of
128Mbytes memory. The HYM7V75AS1601B N-Series are offering fully synchronous operation referenced to a positive
edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are
internally pipelined to achieve very high bandwidth. The DIMM /CAS latency in registered mode is one clock later than
the device /CAS latency because of the register.
FEATURES
鈥?/div>
PC100MHz support
鈥?/div>
168pin SDRAM Registered DIMM
鈥?/div>
Serial Presence Detect with EEPROM
鈥?/div>
1.70鈥?(43.18mm) Height PCB with Double Sided
components
鈥?/div>
Single 3.3
鹵
0.3V power supply
鈥?/div>
All devices pins are compatible with LVTTL interface
鈥?/div>
Data mask function by DQM
鈥?/div>
SDRAM internal banks : four banks
鈥?/div>
Module bank : one physical bank
鈥?/div>
Auto refresh and self refresh
鈥?/div>
4096 refresh cycles / 64ms
鈥?/div>
Programmable Burst Length and Burst Type
-. 1, 2, 4, 8, or Full Page for Sequential Burst
-. 1, 2, 4 or 8 for Interleave Burst
鈥?/div>
Programmable /CAS Latency
-. Device /CAS latency : 2, 3 Clocks
-. DIMM /CAS latency : 3, 4 Clocks (Registered Mode)
ORDERING INFORMATION
PART NO.
HYM7V75AC1601BTNG-8
HYM7V75AC1601BTNG-10P
HYM7V75AC1601BTNG-10S
MAX.
FREQUENCY
125MHz
100MHz
100MHz
4 Banks
4K
Normal
TSOP-II
Gold
INTERNAL
BANK
REF.
POWER
SDRAM
PACKAGE
PLATING
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not
assume any responsibility for use of circuits described. No patent licenses are implied.
1
Rev. 0.2/Dec. 01
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英文版
8Mx64|3.3V|K/H|x4|SDR SDRAM - Unbuffered DIMM 64MB
ETC
-
英文版
8Mx64|3.3V|K/H|x4|SDR SDRAM - Unbuffered DIMM 64MB
ETC
-
英文版
8Mx64|3.3V|P/S|x4|SDR SDRAM - Unbuffered DIMM 64MB
ETC
-
英文版
8Mx64|3.3V|8/P/S|x4|SDR SDRAM - Unbuffered DIMM 64MB
ETC
-
英文版
32Mx64|3.3V|H|x8|SDR SDRAM - Unbuffered DIMM 256MB
ETC
-
英文版
32Mx64|3.3V|P/S|x8|SDR SDRAM - Unbuffered DIMM 256MB
ETC
-
英文版
32Mx72|3.3V|H|x9|SDR SDRAM - Unbuffered DIMM 256MB
ETC
-
英文版
32Mx72|3.3V|P/S|x9|SDR SDRAM - Unbuffered DIMM 256MB
ETC
-
英文版
64Mx64|3.3V|H|x16|SDR SDRAM - Unbuffered DIMM 512MB
ETC
-
英文版
64Mx64|3.3V|P/S|x16|SDR SDRAM - Unbuffered DIMM 512MB
ETC
-
英文版
64Mx72|3.3V|K/H|x18|SDR SDRAM - Unbuffered DIMM 512MB
ETC
-
英文版
64Mx72|3.3V|P/S|x18|SDR SDRAM - Unbuffered DIMM 512MB
ETC
-
英文版
16Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|8/P/S|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|P/S|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|8/P/S|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
-
英文版
16Mx64|3.3V|8/P/S|x8|SDR SDRAM - Unbuffered DIMM 128MB
ETC
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