鈥?/div>
1.700 (43.18mm) PCB Height
168-Pin Registered DIMM with Double Sided
ECC support
One 0.22碌F and one 0.0022碌F decoupling
capacitors adopted
鈥?Auto precharge/precharge all banks by A
10
flag
鈥?Possible to assert random column address every
clock cycle
鈥?Interleaved auto refresh mode
鈥?Programmable burst lengths and sequences
鈥? 1,2,4,8,full page for Sequential type
鈥? 1,2,4,8 for Interleave type
鈥?Programmable /CAS latency ; 2,3 clocks
鈥?Support clock suspend/power down mode by
CKE0
鈥?Data mask function by DQM
鈥?Mode register set programming
鈥?Burst termination commandrefresh control
鈥?Serial Presence Detect with Serial E
2
PROM
鈥?Two Register Buffers & one Inverter used (with
PLL)
鈥?Supports Flow-through or Register mode by Pin
No. 147 (REGE)
鈥?Meets all the other JEDEC specifications
鈥?Single 3.3V鹵0.3V power supply
鈥?All device pins are LVTTL compatible
鈥?8192 refresh cycles every 64ms
ORDERING INFORMATION
Part No.
HYM72V64C756T8-8
HYM72V64C756T8-S
Clock
Frequency
125MHz
Internal
Bank
4 Banks
Ref.
Power
SDRAM
Package
TSOP-II
Plating
8K
Normal
Gold
100MHz
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of
circuits described. No patent licenses are implied.
Rev. 1.2/Feb.01