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HYM72V64C736K8M Datasheet

  • HYM72V64C736K8M

  • 64Mx72|3.3V|H|x18|SDR SDRAM - Registered DIMM 512MB

  • 208.34KB

  • 13頁

  • ETC

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64Mx72 bits
PC133 SDRAM Registered DIMM
with PLL, based on 64Mx4 SDRAM with LVTTL, 4 banks & 8K Refresh
HYM72V64C736T4M Series
Preliminary
DESCRIPTION
The HYM72V64C736T4M Series are 64Mx72bits ECC Synchronous DRAM Modules. The modules are composed of eighteen
64Mx4bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin
glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.
The HYM72V64C736T4M Series are Dual In-line Memory Modules suitable for easy interchange and addition of 512Mbytes mem-
ory. The HYM72V64C736T4M Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and out-
puts are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
FEATURES
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PC133 / PC100 support
1.125鈥?(28.56mm) PCB Height
168-Pin Registered DIMM with Double Sided
ECC support
One 0.22碌F and one 0.0022碌F decoupling capacitors
adopted
Serial Presence Detect with Serial EEPROM
Two Register Buffers & one Inverter used (with PLL)
Supports Flow-through or Register mode by Pin No.
147 (REGE)
Meets all the other JEDEC specifications
Single 3.3V鹵0.3V power supply
All device pins are LVTTL compatible
8192 refresh cycles every 64ms
Auto precharge/precharge all banks by A
10
flag
鈥?Possible to assert random column address every
clock cycle
鈥?Interleaved auto refresh mode
鈥?Programmable burst lengths and sequences
- 1,2,4,8,full page for Sequential type
- 1,2,4,8 for Interleave type
鈥?Programmable /CAS latency ; 2,3 clocks
鈥?Support clock suspend/power down mode by CKE0
鈥?Data mask function by DQM
鈥?Mode register set programming
鈥?Burst termination command
鈥?Self refresh provides minimum power, full internal
refresh control
ORDERING INFORMATION
Part No.
HYM72V64C736T4M-H
Clock
Frequency
133MHz
Internal
Bank
4 Banks
Ref.
8K
Power
Normal
SDRAM
Package
TSOP-II
Plating
Gold
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of
circuits described. No patent licenses are implied.
Rev. 0.1/Jun. 2001

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