based on 32Mx8 SDRAM with LVTTL, 4 banks & 8K Refresh
HYM72V64656T8 Series
DESCRIPTION
The HYM72V64656T8 H-series are high speed 3.3-Volt synchronous dynamic RAM Modules composed of sixteen
32Mx8 bit Synchronous DRAMs in 54-pin TSOPII and 8-pin TSSOP 2K bit EEPROM on a 168-pin glass-epoxy printed
circuit board. One 0.33碌F and one 0.1碌F decoupling capacitors per each SDRAM are mounted on the module.
The HYM72V64656T8 H-series are gold plated socket type Dual In-line Memory Modules suitable for easy interchange
and addition of 512M bytes memory. All addresses, data and control inputs are latched on the rising edge of the master
clock input. The data paths are internally pipelined to achieve very high bandwidths.
FEATURES
鈥?1.25(31.75mm) PCB Height
鈥?168-Pin Unbuffered DIMM with Double Sided
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One 0.33碌F and one 0.1碌F decoupling capacitors
adopted
鈥?Serial Presence Detect with Serial E
2
PROM
鈥?Meets all the other JEDEC specifications
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Single 3.3V鹵0.3V power supply
鈥?All device pins are LVTTL compatible
鈥?8192 refresh cycles / 64ms
鈥?Fully synchronous ; all inputs referenced to posi-
tive edge of system clock
鈥?Quad internal banks with single pulsed /RAS
鈥?Auto precharge/precharge all banks by A
10
flag
鈥?Possible to assert random column address every
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clock cycle
Interleaved auto refresh mode
Programmable burst lengths and sequences
- 1,2,4,8,full page for Sequential type
- 1,2,4,8 for Interleave type
Programmable /CAS latency ; 2,3 clocks
Support clock suspend/power down mode by
CKE0, CKE1
Data mask function by DQM
Mode register set programming
Burst termination command
Self refresh provides minimum power, full internal
refresh control
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ORDERING INFORMATION
Part No.
HYM72V64656T8-8
HYM72V64656T8-S
Clock
Frequency
125MHz
Internal
Bank
4 Banks
Ref.
Power
SDRAM
Package
TSOP-II
Plating
8K
Normal
Gold
100MHz
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of
circuits described. No patent licenses are implied.
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