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Single + 3.3V (鹵 0.3V) supply
CAS-before-RAS refresh, RAS-only-refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
Parallel Presence detects
Utilizes eighteen 4M
脳
4 -DRAMs and four BiCMOS buffers/line drivers
Two versions : HYM 72V4005GS with TSOPII-components (4 mm thickness)
HYM 72V4015GS with SOJ-components (9 mm thickness)
4096 refresh cycles / 64 ms with 12 / 10 addressing
Gold contact pad
Double sided module with 25.35 mm (1000 mil) height
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Semiconductor Group
1
5.96
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