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HYM71V8M655HCLTU6 Datasheet

  • HYM71V8M655HCLTU6

  • 8Mx64|3.3V|8/P/S|x4|SDR SDRAM - SO DIMM 64MB

  • 263.89KB

  • 14頁(yè)

  • ETC

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8Mx64 bits
PC100 SDRAM SO DIMM
based on 8Mx16 SDRAM with LVTTL, 4 banks & 4K Refresh
HYM71V8M655HC(L)TU6 Series
DESCRIPTION
The Hynix HYM71V8M655HCTU6 Series are 8Mx64bits Synchronous DRAM Modules. The modules are composed of four 8Mx16bits
CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 144pin glass-epoxy
printed circuit board. Two 0.33uF and one 0.1uF decoupling capacitors per each SDRAM are mounted on the PCB.
The Hynix HYM71V8M655HCTU6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes
memory. The Hynix HYM71V8M655HCTU6 Series are fully synchronous operation referenced to the positive edge of the clock . All
inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high
bandwidth.
FEATURES
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PC100MHz support
144pin SDRAM Micro SO DIMM
Serial Presence Detect with EEPROM
1.18鈥?(30.00mm) Height PCB with double sided com-
ponents
Single 3.3鹵0.3V power supply
- 1, 2, 4 or 8 or Full page for Sequential Burst
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All device pins are compatible with LVTTL interface
- 1, 2, 4 or 8 for Interleave Burst
Data mask function by DQM
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Programmable CAS Latency ; 2, 3 Clocks
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SDRAM internal banks : four banks
Module bank : one physical bank
Auto refresh and self refresh
4096 refresh cycles / 64ms
Programmable Burst Length and Burst Type
ORDERING INFORMATION
Part No.
HYM71V8M655HCTU6-8
HYM71V8M655HCTU6-P
HYM71V8M655HCTU6-S
HYM71V8M655HCLTU6-8
HYM71V8M655HCLTU6-P
HYM71V8M655HCLTU6-S
Clock
Frequency
125MHz
100MHz
100MHz
125MHz
100MHz
100MHz
Internal
Bank
Ref.
Power
SDRAM
Package
Plating
Normal
4 Banks
4K
Low Power
TSOP-II
Gold
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev. 0.3/Dec. 01
2

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