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HYM4V33100BTWG-75 Datasheet

  • HYM4V33100BTWG-75

  • x32 SDRAM Module

  • 10頁

  • ETC

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1Mx32 bits
PC133 SDRAM AIMM
based on 1Mx32 SDRAM with LVTTL, 2 banks & 4K Refresh
HYM4V33100BTWG Series
DESCRIPTION
The Hynix HYM4V33100BTWG
Series are 1Mx32bits Synchronous DRAM Modules. The modules are composed of one 1Mx32bits
CMOS Synchronous DRAMs in 400mil 86pin TSOP-II package, on a 132pin glass-epoxy printed circuit board. Two 0.22uF and one
0.1uF decoupling capacitors per each SDRAM are mounted on the PCB.
The Hyundai HYM4V33100BTWG
Series are AGP In-line Memory Modules suitable for easy interchange and addition of 4Mbytes
Series are fully synchronous operation referenced to the positive edge of the clock . All
memory. The Hyundai HYM4V33100BTWG
bandwidth.
inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high
FEATURES
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PC133/PC100MHz support
132pin SDRAM
AIMM
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Single 3.3
鹵
0.3V power supply
- 1, 2, 4 or 8 or Full page for Sequential Burst
All device pins are compatible with LVTTL interface
- 1, 2, 4 or 8 for Interleave Burst
Data mask function by DQM
鈥?/div>
SDRAM internal banks : two banks
Programmable CAS Latency ; 2, 3 Clocks
Module bank : one physical bank
Auto refresh and self refresh
4096 refresh cycles / 64ms
Programmable Burst Length and Burst Type
1.4鈥?(35.56mm) Height PCB with double sided com-
ponents
ORDERING INFORMATION
Clock
Frequency
133MHz
Part No.
HYM4V33100BTWG-75
Internal
Bank
2 Banks
Ref.
4K
Power
Normal
SDRAM
Package
TSOP-II
Plating
Gold
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of
circuits described. No patent licenses are implied.
Rev. 0.1/Apr.01

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