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HY29DL162 Datasheet

  • HY29DL162

  • 16M(X8/X16)|3.0V DUAL BANK|70|NOR FLASH - 16M

  • 48頁

  • ETC

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HY29DL162/HY29DL163
16 Megabit (2M x 8/1M x16) Low Voltage,
Dual Bank, Simultaneous Read/Write Flash Memory
KEY FEATURES
n
Single Power Supply Operation
n
n
n
n
n
n
n
n
n
n
n
鈭?/div>
Read, program, and erase operations
from 2.7 to 3.6 V
鈭?/div>
Ideal for battery-powered applications
Simultaneous Read/Write Operations
鈭?/div>
Host system can program or erase in one
bank while simultaneously reading from any
sector in the other bank with zero latency
between read and write operations
High Performance
鈭?/div>
70 and 80 ns access time versions with
30pF load
鈭?/div>
90 and 120 ns access time versions with
100pF load
Ultra Low Power Consumption (Typical
Values)
鈭?/div>
Automatic sleep mode current: 200 nA
鈭?/div>
Standby mode current: 200 nA
鈭?/div>
Read current: 10 mA (at 5 MHz)
鈭?/div>
Program/erase current: 15 mA
Boot-Block Sector Architecture with 39
Sectors in Two Banks for Fast In-System
Code Changes
Secured Sector: An Extra 64 Kbyte Sector
that Can Be:
鈭?/div>
Factory locked and identifiable: 16 bytes
available for a secure, random factory-
programmed Electronic Serial Number
鈭?/div>
Customer lockable: Can be read, program-
med, or erased just like other sectors
Flexible Sector Architecture
鈭?/div>
Sector Protection allows locking of a
sector or sectors to prevent program or
erase operations within that sector
鈭?/div>
Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
Automatic Erase Algorithm Erases Any
Combination of Sectors or the Entire Chip
Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
Compliant with Common Flash Memory
Interface (CFI) Specification
Minimum 100,000 Write Cycles per Sector
(1,000,000 cycles Typical)
Compatible with JEDEC Standards
鈭?/div>
Pinout and software compatible with
single-power supply Flash devices
鈭?/div>
Superior inadvertent write protection
n
Data# Polling and Toggle Bits
n
n
n
n
n
n
鈭?/div>
Provide software confirmation of completion
of program or erase operations
Ready/Busy# Pin
鈭?/div>
Provides hardware confirmation of
completion of program or erase operations
Erase Suspend
鈭?/div>
Suspends an erase operation to allow
programming data to or reading data from
a sector in the same bank
鈭?/div>
Erase Resume can then be invoked to
complete the suspended erasure
Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
WP#/ACC Input Pin
鈭?/div>
Write protect (WP#) function allows
hardware protection of two outermost boot
sectors, regardless of sector protect status
鈭?/div>
Acceleration (ACC) function provides
accelerated program times
Fast Program and Erase Times
鈭?/div>
Sector erase time: 0.5 sec typical
鈭?/div>
Byte/Word program time utilizing
Acceleration function: 10 碌s typical
Space Efficient Packaging
鈭?/div>
48-pin TSOP and 48-ball FBGA packages
LOGIC DIAGRAM
20
A[19:0]
DQ[7:0]
7
CE#
OE#
WE#
RESET#
BYTE#
DQ[14:8]
DQ[15]/A[-1]
WP#/ACC
RY/BY#
8
Preliminary
Revision 1.3, June 2001

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